ADC的SNR：位數(shù)到底去那了？

理論上，一個(gè)ADC的SNR(信號(hào)與噪聲的比值)等于(6.02N＋1.76)dB，這里N等于ADC的位數(shù)。雖然我的數(shù)學(xué)技巧有點(diǎn)生疏，但我認(rèn)為任何一個(gè)16位轉(zhuǎn)換器的信噪比應(yīng)該是98.08dB。但當(dāng)我查看模數(shù)轉(zhuǎn)換器 的數(shù)據(jù)手冊(cè)時(shí)，我看到一些不同的情況。比如，16位的（逐次逼近型）模數(shù)轉(zhuǎn)換器指標(biāo)的典型值通常可低至84dB高達(dá)95dB。生產(chǎn)廠家很自豪地把這些值寫(xiě) 在產(chǎn)品的數(shù)據(jù)手冊(cè)的首頁(yè)，而且坦率地說(shuō)，信噪比為95dB的16位ADC具有競(jìng)爭(zhēng)力。除非我錯(cuò)了，計(jì)算的98.08dB高于所找到最好的16位ADC數(shù)據(jù) 手冊(cè)中的96dB。那么，這些位數(shù)到那去了？

　　讓我們先找出理想化的公式（6.02N＋1.76）從何而來(lái)。任何系統(tǒng)的信噪比，用分貝來(lái)表示的話，等于20log10（信號(hào)的均方根/噪音的均方根）。推導(dǎo)出理想的信噪比公式時(shí)，首先定義信號(hào)的均方根。如果把信號(hào)的峰峰值轉(zhuǎn)換為均方根，則除以 即可。ADC的均方根信號(hào)用位數(shù)表示等于，這里q是LSB（最低有效位）。

　　所有ADC產(chǎn)生量化噪聲是把輸入信號(hào)抽樣成離散“桶”的后果。這些桶的理想寬度等于轉(zhuǎn)換器LSB的大小。任何ADC位的不確定值是±1/2 LSB

。如果假定對(duì)應(yīng)每個(gè)位誤差的響應(yīng)是三角形的話，則其均方根等于LSB信號(hào)的幅值除以，均方根的噪聲則。

　　綜合均方根和均方根噪聲條件，理想ADC的SNR用分貝表示為：

　　重復(fù)剛才的問(wèn)題，那些位數(shù)到底去那了？ 那些ADC的供應(yīng)商熱情地解釋這個(gè)失位現(xiàn)象，因?yàn)樗麄兊谋姸嘣囼?yàn)裝置表明產(chǎn)品具有良好的信噪比。從根本上說(shuō)，他們認(rèn)為電阻和晶體管的噪聲導(dǎo)致了這種結(jié)果。供應(yīng)商測(cè)試其ADC的SNR是通過(guò)將他們的數(shù)據(jù)帶入下面的公式：

　　這些理論和測(cè)試SNR的公式是完善的，但他們只能提供部分你需要知道的轉(zhuǎn)換器到底能給予你的位數(shù)。THD (總諧波失真)，另一個(gè)要注意的ADC指標(biāo)，定義為諧波成分的均方根和，或者是輸入信號(hào)功率的比值

或者

這里HDx是x次諧波失真諧波的幅值，PS是一次諧波的信號(hào)功率，Po是二次到八次諧波的功率。ADC的重要指標(biāo)，INL（積分非線性）誤差清晰地出現(xiàn)在THD結(jié)果中。

　　最后，SINAD（信號(hào)與噪聲＋失真比)定義為信號(hào)基波輸入的RMS值與在半采樣頻率之下其它諧波成分RMS值之和的比值，但不包括直流信號(hào)。對(duì) SAR和流水線型而言，SINAD的理論最小值等于理想的信噪比，或6.02N＋1.76dB。至于Δ-Σ轉(zhuǎn)換器的理想SINAD等于 （6.02N＋1.76dB+，其中fS是轉(zhuǎn)換器采樣頻率，BW是感興趣的最大帶寬。非理想SINAD值為或者

其中PS是基波信號(hào)功率，PN是所有噪聲譜成分的功率，PD是失真譜成分功率。

　　因此，下一次當(dāng)你尋找丟失的位數(shù)時(shí)，記住它是結(jié)合了SNR、THD和SINAD等多個(gè)指標(biāo)，這些可以讓您全面了解ADC的真實(shí)位數(shù)--無(wú)論它采用的是逐次逼近型、流水線型還是Δ-Σ技術(shù)，不管在數(shù)據(jù)手冊(cè)的第一頁(yè)中提到有多少位。

附英文原文：

　　SNR in ADCs: Where did all the bits go?

　　Theoretically, the SNR for any 16-bit converter should be 98.08 dB. But I see something different when I read converter data sheets.

　　By Bonnie Baker -- EDN, 6/7/2007

　　Theoretically, the SNR (signal-to-noise ratio) of an ADC is equal to (6.02N+1.76) dB, where N equals the number of ADC bits. Although I’m a little rusty with my algebra skills, I think that the SNR for any 16-bit converter should be 98.08 dB. However, I see something different when I read converter data sheets. For instance, the specification for a 16-bit SAR (successive-approximation-register) converter can typically be as low as 84 dB and as high as 95 dB. Manufacturers proudly advertise these values on the front page of their data sheets, and, frankly, an SNR of 95 dB for a 16-bit SAR converter is competitive. Unless I am wrong, the 98.08 dB I calculate is higher than the 95-dB specification that I find with the best of the 16-bit-converter data sheets. So, where did the bits go?

　　Let’s start by finding out where this ideal formula, 6.02N+1.76, comes from. The SNR of any system, in decibels, is equal to 20 log10 (rms signal/rms noise). When you d

erive the ideal SNR formula, you first define the rms signal. If you change a peak-to-peak signal to rms, you divide it by the The ADC rms signal in bits is equal where q is the LSB (least-significant bit).

　　All ADCs generate quantization noise as a consequence of dividing the input signal into discrete “buckets.” The ideal width of these buckets is equal to the converter’s LSB size. The uncertainty of any ADC bit is ±1/2 LSB. If you assume that this error’s response is triangular across each bit, the rms value equals this LSB signal’s magnitude divided by：rms noise

　　Combining the rms-signal and rms-noise terms, the ideal ADC SNR in decibels is:

　　Again, where did the bits go? The ADC vendors enthusiastically explain the missing-bits phenomenon, because they bench-test their devices to see how good the SNR is. Fundamentally, they find that the device noise from resistors and transistors creeps into the results. Vendors test their ADC SNR by inputting their data into the following formula:

　　These theoretical and tested SNR formulas are complete, but they provide only part of what you need to know about how many bits your converter is truly giving you. THD (total harmonic distortion), another ADC specification you need to watch, is the ratio of the rms sum of the powers of the harmonic components, or spurs, to the input-signal power:

or

　　where HDx is the magnitude of distortion at the Xth harmonic, PS is the signal power of the first harmonic, and PO is the power of harmonics two through eight. Significant ADC INL (integral-nonlinearity) errors typically appear in the THD results.

　　Finally, SINAD (signal-to-noise and distortion) is the ratio of the fundamental input signal’s rms amplitude to the rms sum of all other spectral components below half of the sampling frequency, excluding dc. The theoretical minimum for SINAD is equal to the ideal SNR, or 6.02N+1.76 dB, with SAR and pipeline converters. For delta-sigma converters, the ideal SINAD equals 6.02N+1.76 dB+10 log10(fS/(2BW)), where fS is the converter sampling frequency and BW is the maximum bandwidth of interest. The not-so-ideal value of SINAD is or.

　　where PS is the fundamental signal power, PN is the power of all the noise spectral components, and PD is the power of all the distortion spectral components.

　　So, the next time you’re looking for lost bits, remember that it is the combination of SNR, THD, and SINAD that gives you the complete picture of the real bits in your ADC—regardless of whether it’s SAR, pipeline, or delta-sigma technology and regardless of the number of bits that the first page of the data sheet mentions.