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STM32F407 外擴SRAM

作者: 時間:2016-11-10 來源:網(wǎng)絡(luò) 收藏
字節(jié)控制功能。支持高/低字節(jié)控制。

看看實現(xiàn)IS62WV51216的訪問,需要對FSMC進行哪些配置。這里就做一個概括性的講解。步驟如下:

本文引用地址:http://m.butianyuan.cn/article/201611/317497.htm

1)使能FSMC時鐘,并配置FSMC相關(guān)的IO及其時鐘使能。

要使用FSMC,當(dāng)然首先得開啟其時鐘。然后需要把FSMC_D0~15,F(xiàn)SMCA0~18等相關(guān)IO口,全部配置為復(fù)用輸出,并使能各IO組的時鐘。

使能FSMC時鐘的方法:

RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC,ENABLE);

對于其他IO口設(shè)置的方法前面講解很詳細,這里不做過多的講解。

2)設(shè)置FSMCBANK1區(qū)域3。

此部分包括設(shè)置區(qū)域3的存儲器的工作模式、位寬和讀寫時序等。我們使用模式A、16位寬,讀寫共用一個時序寄存器。使用的函數(shù)是:

void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct)

3)使能BANK1區(qū)域3。

使能BANK的方法跟前面LCD實驗一樣,函數(shù)是:

void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState);

通過以上幾個步驟,完成了FSMC的配置,可以訪問IS62WV51216了,這里還需要注意,因為我們使用的是BANK1的區(qū)域3,所以HADDR[27:26]=10,故外部內(nèi)存的首地址為0X68000000。

代碼:

#include "fsmc_sram.h"#define Bank1_SRAM3_ADDR ((u32)(0x68000000))void GPIO_SRAM_Init(void){GPIO_InitTypeDef GPIO_InitStructure;RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOF, ENABLE);RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOG, ENABLE);GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_2 |GPIO_Pin_3 |GPIO_Pin_14|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_12|GPIO_Pin_13|GPIO_Pin_15;GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_NOPULL;GPIO_Init(GPIOF, &GPIO_InitStructure);GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_2 |GPIO_Pin_3 |GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_10;GPIO_Init(GPIOG, &GPIO_InitStructure);GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_4 |GPIO_Pin_5 |GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10|GPIO_Pin_11|GPIO_Pin_12|GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15;GPIO_Init(GPIOD, &GPIO_InitStructure);GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_15|GPIO_Pin_10|GPIO_Pin_11|GPIO_Pin_12|GPIO_Pin_13|GPIO_Pin_14;GPIO_Init(GPIOE, &GPIO_InitStructure);GPIO_PinAFConfig(GPIOD, GPIO_PinSource0,  GPIO_AF_FSMC);//D2GPIO_PinAFConfig(GPIOD, GPIO_PinSource1,  GPIO_AF_FSMC);//D3GPIO_PinAFConfig(GPIOD, GPIO_PinSource4,  GPIO_AF_FSMC);//NOEGPIO_PinAFConfig(GPIOD, GPIO_PinSource5,  GPIO_AF_FSMC);//NWEGPIO_PinAFConfig(GPIOD, GPIO_PinSource8,  GPIO_AF_FSMC);//D13GPIO_PinAFConfig(GPIOD, GPIO_PinSource9,  GPIO_AF_FSMC);//D14GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);//D15GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);//A16GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);//A17GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);//A18GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);//D0GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);//D1GPIO_PinAFConfig(GPIOE, GPIO_PinSource0,  GPIO_AF_FSMC);//NBL0GPIO_PinAFConfig(GPIOE, GPIO_PinSource1,  GPIO_AF_FSMC);//NBL1GPIO_PinAFConfig(GPIOE, GPIO_PinSource7,  GPIO_AF_FSMC);//D4GPIO_PinAFConfig(GPIOE, GPIO_PinSource8,  GPIO_AF_FSMC);//D5GPIO_PinAFConfig(GPIOE, GPIO_PinSource9,  GPIO_AF_FSMC);//D6GPIO_PinAFConfig(GPIOE, GPIO_PinSource10, GPIO_AF_FSMC);//D7GPIO_PinAFConfig(GPIOE, GPIO_PinSource11, GPIO_AF_FSMC);//D8GPIO_PinAFConfig(GPIOE, GPIO_PinSource12, GPIO_AF_FSMC);//D9GPIO_PinAFConfig(GPIOE, GPIO_PinSource13, GPIO_AF_FSMC);//D10GPIO_PinAFConfig(GPIOE, GPIO_PinSource14, GPIO_AF_FSMC);//D11GPIO_PinAFConfig(GPIOE, GPIO_PinSource15, GPIO_AF_FSMC);//D12GPIO_PinAFConfig(GPIOG, GPIO_PinSource0,  GPIO_AF_FSMC);//A10GPIO_PinAFConfig(GPIOG, GPIO_PinSource1,  GPIO_AF_FSMC);//A11GPIO_PinAFConfig(GPIOG, GPIO_PinSource2,  GPIO_AF_FSMC);//A12GPIO_PinAFConfig(GPIOG, GPIO_PinSource3,  GPIO_AF_FSMC);//A13GPIO_PinAFConfig(GPIOG, GPIO_PinSource4,  GPIO_AF_FSMC);//A14GPIO_PinAFConfig(GPIOG, GPIO_PinSource5,  GPIO_AF_FSMC);//A15GPIO_PinAFConfig(GPIOG, GPIO_PinSource10, GPIO_AF_FSMC);//NE3GPIO_PinAFConfig(GPIOF, GPIO_PinSource0,  GPIO_AF_FSMC);//A0GPIO_PinAFConfig(GPIOF, GPIO_PinSource1,  GPIO_AF_FSMC);//A1GPIO_PinAFConfig(GPIOF, GPIO_PinSource2,  GPIO_AF_FSMC);//A2GPIO_PinAFConfig(GPIOF, GPIO_PinSource3,  GPIO_AF_FSMC);//A3GPIO_PinAFConfig(GPIOF, GPIO_PinSource4,  GPIO_AF_FSMC);//A4GPIO_PinAFConfig(GPIOF, GPIO_PinSource5,  GPIO_AF_FSMC);//A5GPIO_PinAFConfig(GPIOF, GPIO_PinSource12, GPIO_AF_FSMC);//A6GPIO_PinAFConfig(GPIOF, GPIO_PinSource13, GPIO_AF_FSMC);//A7GPIO_PinAFConfig(GPIOF, GPIO_PinSource14, GPIO_AF_FSMC);//A8GPIO_PinAFConfig(GPIOF, GPIO_PinSource15, GPIO_AF_FSMC);//A9}void FSMC_SRAM_Init(void){    FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;FSMC_NORSRAMTimingInitTypeDef p;p.FSMC_AddressSetupTime = 0x00;     //地址建立時間(ADDSET)為1個HCLK 1/36M=27nsp.FSMC_AddressHoldTime = 0x00;     //地址保持時間(ADDHLD)模式A未用到    p.FSMC_DataSetupTime = 0x03;         //數(shù)據(jù)保持時間(DATAST)為3個HCLK 4/72M=55ns(對EM的SRAM芯片)    p.FSMC_BusTurnAroundDuration = 0x00;p.FSMC_CLKDivision = 0x00;p.FSMC_DataLatency = 0x00;p.FSMC_AccessMode = FSMC_AccessMode_A;     //模式AFSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;// 這里我們使用NE3 ,也就對應(yīng)BTCR[4],[5]。FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;FSMC_NORSRAMInitStructure.FSMC_MemoryType =FSMC_MemoryType_SRAM;// FSMC_MemoryType_SRAM; //SRAMFSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;//存儲器數(shù)據(jù)寬度為16bitFSMC_NORSRAMInitStructure.FSMC_BurstAccessMode =FSMC_BurstAccessMode_Disable;// FSMC_BurstAccessMode_Disable;FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait=FSMC_AsynchronousWait_Disable;FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;    //存儲器寫使能FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; // 讀寫使用相同的時序FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; //讀寫同樣時序FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); //初始化FSMC配置FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); // 使能BANK3                                        }void SRAM_Init(void){GPIO_SRAM_Init();FSMC_SRAM_Init();}/* -------------------------------在指定地址開始,連續(xù)寫入n個字節(jié).pBuffer:字節(jié)指針WriteAddr:要寫入的地址n:要寫入的字節(jié)數(shù)--------------------------------*/void FSMC_SRAM_WriteBuffer(u8* pBuffer,u32 WriteAddr,u32 n){for(;n!=0;n--){                                        *(vu8*)(Bank1_SRAM3_ADDR+WriteAddr)=*pBuffer;    WriteAddr+=2;pBuffer++;}}/*-------------------------------在指定地址開始,連續(xù)讀出n個字節(jié).pBuffer:字節(jié)指針ReadAddr:要讀出的起始地址n:要寫入的字節(jié)數(shù)--------------------------------*/void FSMC_SRAM_ReadBuffer(u8* pBuffer,u32 ReadAddr,u32 n){for(;n!=0;n--){                                            *pBuffer++=*(vu8*)(Bank1_SRAM3_ADDR+ReadAddr);ReadAddr+=2;}}/*-------------------------------測試函數(shù)在指定地址寫入1個字節(jié)addr:地址data:要寫入的數(shù)據(jù)-------------------------------*/void fsmc_sram_test_write(u8 data,u32 addr){            FSMC_SRAM_WriteBuffer(&data,addr,1); //寫入1個字節(jié)}/*------------------------------讀取1個字節(jié)addr:要讀取的地址返回值:讀取到的數(shù)據(jù)------------------------------*/u8 fsmc_sram_test_read(u32 addr){u8 data;FSMC_SRAM_ReadBuffer(&data,addr,1);return data;} 



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