stm32f407時(shí)鐘配置方法例程解析
/**
* @說明配置STM32F407的時(shí)鐘系統(tǒng)
* @參數(shù)無
* @返回?zé)o
* @說明 void Clock_Config(void)按如下表格配置時(shí)鐘
*
*==================================================================
* Supported STM32F4xx device revision | Rev A
*-----------------------------------------------------------------------------
* System Clock source | PLL (HSE)
*-----------------------------------------------------------------------------
* SYSCLK(Hz) | 168000000
*-----------------------------------------------------------------------------
* HCLK(Hz) | 168000000
*-----------------------------------------------------------------------------
* AHB Prescaler | 1
*-----------------------------------------------------------------------------
* APB1 Prescaler | 4
*-----------------------------------------------------------------------------
* APB2 Prescaler | 2
*-----------------------------------------------------------------------------
* HSE Frequency(Hz) | 8000000
*-----------------------------------------------------------------------------
* PLL_M |8
*-----------------------------------------------------------------------------
* PLL_N | 336
*-----------------------------------------------------------------------------
* PLL_P | 2
*-----------------------------------------------------------------------------
* PLL_Q |7
*===================================================================
*/
void Clock_Config(void){
ErrorStatus State;
uint32_t PLL_M;
uint32_t PLL_N;
uint32_t PLL_P;
uint32_t PLL_Q;
/*配置前將所有RCC重置為初始值*/
RCC_DeInit();
/*這里選擇 外部晶振(HSE)作為 時(shí)鐘源,因此首先打開外部晶振*/
RCC_HSEConfig(RCC_HSE_ON);
/*等待外部晶振進(jìn)入穩(wěn)定狀態(tài)*/
while( RCC_WaitForHSEStartUp() != SUCCESS );
/*
**我們要選擇PLL時(shí)鐘作為系統(tǒng)時(shí)鐘,因此這里先要對(duì)PLL時(shí)鐘進(jìn)行配置
*/
/*選擇外部晶振作為PLL的時(shí)鐘源*/
/* 到這一步為止,已有HSE_VALUE = 8 MHz.
PLL_VCO input clock = (HSE_VALUE or HSI_VALUE / PLL_M),
根據(jù)文檔,這個(gè)值被建議在1~2MHz,因此我們令PLL_M = 8,
即PLL_VCO input clock = 1MHz */
PLL_M = 8;
/* 到這一步為止,已有PLL_VCO input clock = 1 MHz.
PLL_VCO output clock = (PLL_VCO input clock) * PLL_N,
這個(gè)值要用來計(jì)算系統(tǒng)時(shí)鐘,我們 令PLL_N = 336,
即PLL_VCO output clock = 336 MHz.*/
PLL_N = 336;
/* 到這一步為止,已有PLL_VCO output clock = 336 MHz.
System Clock = (PLL_VCO output clock)/PLL_P ,
因?yàn)槲覀円猄ystemClock = 168 Mhz,因此令PLL_P = 2.
*/
PLL_P = 2;
/*這個(gè)系數(shù)用來配置SD卡讀寫,USB等功能,暫時(shí)不用,根據(jù)文檔,暫時(shí)先設(shè)為7*/
PLL_Q = 7;
/* 配置PLL并將其使能,獲得168Mhz的System Clock時(shí)鐘*/
RCC_PLLConfig(RCC_PLLSource_HSE, PLL_M, PLL_N, PLL_P, PLL_Q);
RCC_PLLCmd(ENABLE);
/*到了這一步,我們已經(jīng)配置好了PLL時(shí)鐘。下面我們配置Syetem Clock*/
/*選擇PLL時(shí)鐘作為系統(tǒng)時(shí)鐘源*/
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
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