9G-STM32 EWARM開發(fā)過程簡(jiǎn)介之五

一，建立工程FATFS源碼
1，在http://elm-chan.org/fsw/ff/00index_e.html上下載ff007c.zip，并把ff007c.zip里面的
src文件夾復(fù)制到D:worksEK-STM3210E-UCOSII下，并改名為Fatfs；
2，在IDE工程中右擊選擇“Add Group”建立“FATFS”文件組，并在“FATFS”上右擊選擇“Add Files”添加
D:worksEK-STM3210E-UCOSIIFatfs下的C文件；
3，把D:worksEK-STM3210E-UCOSIIFatfs文件夾目錄添加到項(xiàng)目頭文件搜索路徑中，如：
$PROJ_DIR$....Fatfs

二，移植NANDFLASH驅(qū)動(dòng)接口
1，把stm32f10x_stdperiph_lib_v3.0.0ProjectExamplesFSMCNAND下的fsmc_nand.c復(fù)制到
D:worksEK-STM3210E-UCOSIIDrivers下，并加入到工程的DRV文件組；
2，把stm32f10x_stdperiph_lib_v3.0.0ProjectExamplesFSMCNAND下的fsmc_nand.h復(fù)制到
D:worksEK-STM3210E-UCOSIIInclude下；
3，在fsmc_nand.c前添加上#include "stm32f10x_conf.h"，并把系統(tǒng)中的 "stm32f10x_conf.h"
文件的/* #include "stm32f10x_fsmc.h" */注釋打開；

三，修改FATFS的配置文件
1，把D:worksEK-STM3210E-UCOSIIFatfs下的ff.h中的宏定義：
#define_USE_MKFS0
#define _CODE_PAGE932
#define _FS_RPATH0
#define_MAX_SS512
修改為：
#define_USE_MKFS1
#define _CODE_PAGE936
#define_MAX_SS2048
#define _FS_RPATH1
2，把D:worksEK-STM3210E-UCOSIIFatfs下的integer.h的宏定義：
typedef enum { FALSE = 0, TRUE } BOOL;
修改為：
typedef bool BOOL;//typedef enum { FALSE = 0, TRUE } BOOL;
四，修改FATFS的DISK/IO接口
1，把diskio.c復(fù)制后改名為nandio.c替換掉工程中的diskio.c，并添加到EWARM的工程中的
“FATFS”文件組；
2，媒介初始化直接返回正常的0：
DSTATUS disk_initialize (BYTE drv)
{ return 0;}
3，媒介狀態(tài)查詢直接返回正常的0：
DSTATUS disk_status (BYTE drv)
{ return 0;}
4，取系統(tǒng)系統(tǒng)直接返回0(自己可以按格式修改為真實(shí)時(shí)間)：
DWORD get_fattime (void)
{ return 0;}
5，媒介控制接口：
DRESULT disk_ioctl (BYTE drv,BYTE ctrl,void *buff)
{
DRESULT res = RES_OK;
uint32_t result;

if (drv){return RES_PARERR;}

switch(ctrl)
{
case CTRL_SYNC:
break;
case GET_BLOCK_SIZE:
*(DWORD*)buff = NAND_BLOCK_SIZE;
break;
case GET_SECTOR_COUNT:
*(DWORD*)buff = (((NAND_MAX_ZONE/2) * NAND_ZONE_SIZE) * NAND_BLOCK_SIZE);
break;
case GET_SECTOR_SIZE:
*(WORD*)buff = NAND_PAGE_SIZE;
break;
default:
res = RES_PARERR;
break;
}
return res;
}
6，媒介多扇區(qū)讀接口：
DRESULT disk_read (BYTE drv,BYTE *buff,DWORD sector,BYTE count)
{
uint32_t result;

if (drv || !count){ return RES_PARERR;}
result = FSMC_NAND_ReadSmallPage(buff, sector, count);
if(result & NAND_READY){ return RES_OK; }
else { return RES_ERROR; }
}
7，媒介多扇區(qū)寫接口：
#if _READONLY == 0
DRESULT disk_write (BYTE drv,const BYTE *buff,DWORD sector,BYTE count)
{
uint32_t result;
uint32_t BackupBlockAddr;
uint32_t WriteBlockAddr;
uint16_t IndexTmp = 0;
uint16_t OffsetPage;

/* NAND memory write page at block address*/
WriteBlockAddr = (sector/NAND_BLOCK_SIZE);
/* NAND memory backup block address*/
BackupBlockAddr = (WriteBlockAddr + (NAND_MAX_ZONE/2)*NAND_ZONE_SIZE);
OffsetPage = sector%NAND_BLOCK_SIZE;

if (drv || !count){ return RES_PARERR;}

/* Erase the NAND backup Block */
result = FSMC_NAND_EraseBlock(BackupBlockAddr*NAND_BLOCK_SIZE);

/* Backup the NAND Write Block to High zone*/

for (IndexTmp = 0; IndexTmp < NAND_BLOCK_SIZE; IndexTmp++ )
{
FSMC_NAND_MoveSmallPage (WriteBlockAddr*NAND_BLOCK_SIZE+IndexTmp,BackupBlockAddr*NAND_BLOCK_SIZE+IndexTmp);
}

/* Erase the NAND Write Block */
result = FSMC_NAND_EraseBlock(WriteBlockAddr*NAND_BLOCK_SIZE);

/*return write the block with modify*/
for (IndexTmp = 0; IndexTmp < NAND_BLOCK_SIZE; IndexTmp++ )
{
if((IndexTmp>=OffsetPage)&&(IndexTmp < (OffsetPage+count)))
{
FSMC_NAND_WriteSmallPage((uint8_t *)buff, WriteBlockAddr*NAND_BLOCK_SIZE+IndexTmp, 1);
buff = (uint8_t *)buff + NAND_PAGE_SIZE;
}
else
{
FSMC_NAND_MoveSmallPage (BackupBlockAddr*NAND_BLOCK_SIZE+IndexTmp,WriteBlockAddr*NAND_BLOCK_SIZE+IndexTmp);
}
}

if(result == NAND_READY){ return RES_OK;}
else { return RES_ERROR;}
}
#endif /* _READONLY */
五，調(diào)用接口及測(cè)試代碼
1，調(diào)用接口，先初始化FSMC和NANDFLASH：
//NANDFLASH HY27UF081G2A-TPCB
#define NAND_HY_MakerID 0xAD
#define NAND_HY_DeviceID 0xF1

/* Configure the NAND FLASH */
void NAND_Configuration(void)
{
NAND_IDTypeDef NAND_ID;

/* Enable the FSMC Clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);

/* FSMC Initialization */
FSMC_NAND_Init();

/* NAND read ID command */
FSMC_NAND_ReadID(&NAND_ID);

/* Verify the NAND ID */
if((NAND_ID.Maker_ID == NAND_ST_MakerID) && (NAND_ID.Device_ID == NAND_ST_DeviceID))
{
printf("ST NANDFLASH");
}
else
if((NAND_ID.Maker_ID == NAND_HY_MakerID) && (NAND_ID.Device_ID == NAND_HY_DeviceID))
{
printf("HY27UF081G2A-TPCB");
}
printf(" ID = 0x%x%x%x%x ",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
}
2，然后對(duì)媒介格式化，創(chuàng)建讀寫文件：
void test_fatfs(void)
{
FATFS fs;
FIL fl;
FATFS *pfs;
DWORD clust;
unsigned int r,w,i;
FRESULT res;

//NF_CHKDSK(0,1024);
display_page(0,0);

// for mount
res=f_mount(0,&fs);
printf("f_mount=%x ",res);

// for format
//res=f_mkfs(0,1,2048);//MUST Format for New NANDFLASH !!!
//printf("f_mkfs=%x ",res);

// for
pfs=&fs;
res = f_getfree("/", &clust, &pfs);
printf("f_getfree=%x ",res);
printf("%lu MB total drive space."
"%lu MB available.",
(DWORD)(pfs->max_clust - 2) * pfs->csize /2/1024,
clust * pfs->csize /2/1024);

// for read
res=f_open(&fl,"/test2.dat",FA_OPEN_EXISTING | FA_READ);
printf("f_open=%x ",res);
for(i=0;i<2;i++)
{
for(r = 0; r < NAND_PAGE_SIZE; r++)
{
RxBuffer[r]= 0xff;
}

res=f_read(&fl,RxBuffer,NAND_PAGE_SIZE,&r);
printf("f_read=%x ",res);
if(res || r == 0)break;
for(r = 0; r < NAND_PAGE_SIZE; r++)
{
printf("D[%08x]=%02x ",(i*NAND_PAGE_SIZE+r),RxBuffer[r]);
if((r%8)==7)
{printf("");}
}

}
f_close(&fl);
// for write
res=f_open(&fl,"/test2.dat",FA_CREATE_ALWAYS | FA_WRITE);
printf("f_open=%x ",res);
for(i=0;i<2;i++)
{
for(w = 0; w < NAND_PAGE_SIZE; w++)
{
TxBuffer[w]=((w<<0)&0xff);
}
res=f_write(&fl,TxBuffer,NAND_PAGE_SIZE,&w);
printf("f_write=%x ",res);
if(res || w
}
f_close(&fl);

// for umount
f_mount(0,NULL);
}

六，編寫NANDFLASH接口
1，fsmc_nand.c文件：
/* Includes ------------------------------------------------------------------*/
#include "fsmc_nand.h"
#include "stm32f10x_conf.h"

/** @addtogroup StdPeriph_Examples
* @{
*/

/** @addtogroup FSMC_NAND
* @{
*/

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/

#define FSMC_Bank_NAND FSMC_Bank2_NAND
#define Bank_NAND_ADDR Bank2_NAND_ADDR
#define Bank2_NAND_ADDR ((uint32_t)0x70000000)

/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/

/**
* @brief Configures the FSMC and GPIOs to interface with the NAND memory.
* This function must be called before any write/read operation
* on the NAND.
* @param None
* @retval : None
*/
void FSMC_NAND_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
FSMC_NANDInitTypeDef FSMC_NANDInitStructure;
FSMC_NAND_PCCARDTimingInitTypeDef p;

RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE |
RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG, ENABLE);

/*-- GPIO Configuration ------------------------------------------------------*/
/* CLE, ALE, D0->D3, NOE, NWE and NCE2 NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_14 | GPIO_Pin_15 |
GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 |
GPIO_Pin_7;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;

GPIO_Init(GPIOD, &GPIO_InitStructure);

/* D4->D7 NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;

GPIO_Init(GPIOE, &GPIO_InitStructure);


/* NWAIT NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;

GPIO_Init(GPIOD, &GPIO_InitStructure);

/* INT2 NAND pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_Init(GPIOG, &GPIO_InitStructure);

/*-- FSMC Configuration ------------------------------------------------------*/
p.FSMC_SetupTime = 0x1;
p.FSMC_WaitSetupTime = 0x3;
p.FSMC_HoldSetupTime = 0x2;
p.FSMC_HiZSetupTime = 0x1;

FSMC_NANDInitStructure.FSMC_Bank = FSMC_Bank2_NAND;
FSMC_NANDInitStructure.FSMC_Waitfeature = FSMC_Waitfeature_Enable;
FSMC_NANDInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
FSMC_NANDInitStructure.FSMC_ECC = FSMC_ECC_Enable;
FSMC_NANDInitStructure.FSMC_ECCPageSize = FSMC_ECCPageSize_512Bytes;
FSMC_NANDInitStructure.FSMC_TCLRSetupTime = 0x00;
FSMC_NANDInitStructure.FSMC_TARSetupTime = 0x00;
FSMC_NANDInitStructure.FSMC_CommonSpaceTimingStruct = &p;
FSMC_NANDInitStructure.FSMC_AttributeSpaceTimingStruct = &p;

FSMC_NANDInit(&FSMC_NANDInitStructure);

/* FSMC NAND Bank Cmd Test */
FSMC_NANDCmd(FSMC_Bank2_NAND, ENABLE);
}

/**
* @brief Reads NAND memorys ID.
* @param NAND_ID: pointer to a NAND_IDTypeDef structure which will hold
* the Manufacturer and Device ID.
* @retval : None
*/
void FSMC_NAND_ReadID(NAND_IDTypeDef* NAND_ID)
{
uint32_t data = 0;

/* Send Command to the command area */
*(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_READID;
/* Send Address to the address area */
*(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = NAND_CMD_IDADDR;

/* Sequence to read ID from NAND flash */
data = *(__IO uint32_t *)(Bank_NAND_ADDR | DATA_AREA);

NAND_ID->Maker_ID = DATA_1st_CYCLE (data);
NAND_ID->Device_ID = DATA_2nd_CYCLE (data);
NAND_ID->Third_ID = DATA_3rd_CYCLE (data);
NAND_ID->Fourth_ID = DATA_4th_CYCLE (data);
}
/**
* @brief This routine is for move one 2048 Bytes Page size to an other 2048 Bytes Page.
* the copy-back program is permitted just between odd address pages or even address pages.
* @param SourcePageAddress: Source page address
* @param TargetPageAddress: Target page address
* @retval : New status of the NAND operation. This parameter can be:
* - NAND_TIMEOUT_ERROR: when the previous operation generate
* a Timeout error
* - NAND_READY: when memory is ready for the next operation
* And the new status of the increment address operation. It can be:
* - NAND_VALID_ADDRESS: When the new address is valid address
* - NAND_INVALID_ADDRESS: When the new address is invalid address
*/
uint32_t FSMC_NAND_MoveSmallPage(uint32_t SourcePageAddress, uint32_t TargetPageAddress)
{
uint32_t status = NAND_READY ;
uint32_t data = 0xff;

/* Page write command and address */
*(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_MOVE0;

*(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(SourcePageAddress);
*(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(SourcePageAddress);
*(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(SourcePageAddress);
*(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_4th_CYCLE(SourcePageAddress);

*(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_MOVE1;

while( GPIO_ReadInputDataBit(GPIOG, GPIO_Pin_6) == 0 );

*(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_MOVE2;

*(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(TargetPageAddress);
*(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(TargetPageAddress);
*(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(TargetPageAddress);
*(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_4th_CYCLE(TargetPageAddress);

*(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_MOVE3;

while( GPIO_ReadInputDataBit(GPIOG, GPIO_Pin_6) == 0 );

/* Check status for successful operation */
status = FSMC_NAND_GetStatus();

data = *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA);
if(!(data&0x1)) status = NAND_READY;

return (status);
}