計算延時線的最高工作頻率
摘要:延遲線在應用中要求一個(納秒),或者增量時間更正為系統(tǒng)正常工作所需的幾納秒信號延遲。 This application note discusses the maximum frequency that the input signal could have, and the maximum delay that can be obtained. 本應用指南討論了最高頻率的輸入信號可以,最大的延遲可以得到。
A similar version of this article was published on February 24, 2009 on the Industrial Control DesignLine website.這個類似文章發(fā)表在2009年2月24日在工業(yè)控制DesignLine網(wǎng)站。
Calculating Maximum Input Frequency計算最大輸入頻率
When calculating the maximum input frequency, the critical parameter to consider is the minimum pulse width of the input signal.當計算的最大輸入頻率,最重要的參數(shù)要考慮的是輸入信號的最小脈沖寬度。 For periodic signals with a 50% duty cycle, the minimum pulse width would be half the period of the signal.對于具有50%的占空比,最小脈寬周期信號將一半的一段期間的信號。 This value, in turn, determines the maximum possible delay.此值,從而決定了最大可能延誤。 Sometimes the input is periodic with a low frequency, but with a duty cycle of less than 50%.有時,是周期性的輸入與低頻,但低于50%的占空比。 In this case, the width of the minimum duration between transitions (t WI ) on the input determines the minimum pulse width ( Figure 1 ).在這種情況下,之間的轉換(噸威斯康星州 )最短的輸入寬度確定最小脈寬( 圖1)。 In a number of devices, the minimum-input pulse width possible is specified as 100% of the maximum output delay desired (if not explicitly specified).在許多設備,最小輸入脈沖寬度可能被指定為100%,最高產(chǎn)量所需的延遲(如果沒有明確規(guī)定)。 The maximum output delay for these devices is, therefore (conversely), the same as the minimum-input pulse width.這些器件的最大輸出延遲,因此(反過來),在相同的最低輸入脈沖寬度。Figure 1. 圖1。 Illustration shows how the minimum duration between transitions (t WI ) of the input signal determines the maximum possible delay. 圖顯示與輸入信號的轉換(噸威斯康星州 )最低期限確定最大的延誤。
Maximum Input Frequency for Programmable Delay Lines最大輸入頻率為可編程延時線
The specifications to consider for programmable delay lines are found in the product data sheet:這些規(guī)范考慮可編程延時線是在產(chǎn)品數(shù)據(jù)表中:- Zero-step delay (t PHL_MIN or t PLH_MIN )零延遲步(噸PHL_MIN或t PLH_MIN)
- Minimum-input pulse width (t WI_MIN )最小輸入脈沖寬度(噸WI_MIN)
Table 1 gives some examples of the maximum allowable frequency for various devices. 表1給出了最高頻率的各種設備允許的一些例子。
Table 1. 表1。 Maximum Input Frequencies for Programmable Delay Lines 最大輸入頻率為可編程延時線
Part Number零件編號 | Description描述 | Minimum or Zero-Step Delay, t PHL_MIN or t PLH_MIN (ns)最低或零延遲步,噸PHL_MIN或噸PLH_MIN(NS)的 | Maximum Zero-Step Delay (ns)最大零延遲步(NS)的 | Minimum Pulse Width t WI_MIN (ns)最小脈寬噸WI_MIN(NS)的 | Maximum Input Frequency (MHz)最大輸入頻率(MHz) | |
DS1020-100 DS1020 - 100 | 8-bit silicon delay line 8位硅延遲線 | 10 ± 2 10 ± 2 | 12 12 | 100% of output delay 100%的輸出延遲 | 12 12 | 41.67 41.67 |
DS1020-25 DS1020 - 25 | 8-bit silicon delay line 8位硅延遲線 | 10 ± 2 10 ± 2 | 12 12 | 100% of output delay 100%的輸出延遲 | 12 12 | 41.67 41.67 |
DS1021-25 DS1021 - 25 | 8-bit silicon delay line 8位硅延遲線 | 10 ± 2 10 ± 2 | 12 12 | 100% of output delay 100%的輸出延遲 | 12 12 | 41.67 41.67 |
DS1023-25 DS1023 - 25 | 8-bit timing element 8位定時元件 | 16.5 16.5 | 22 22 | 20 20 | 20 20 | 25 25 |
DS1023-500 DS1023 - 500 | 8-bit timing element 8位定時元件 | 16.5 16.5 | 22 22 | 50 50 | 50 50 | 10 10 |
DS1045-3 DS1045 - 3 | 4-bit dual delay line 4位雙延遲線 | 9 ± 1 9 ± 1 | 10 10 | 100% of output delay 100%的輸出延遲 | 10 10 | 50 50 |
Maximum Input Frequency for Nonprogrammable Delay Lines最大輸入頻率為不可編程延時線
For nonprogrammable delay lines, the specifications to consider are also found in the product data sheet:對于不可編程延時線,規(guī)格也考慮在產(chǎn)品數(shù)據(jù)表中:- Delay at maximum tap position在最大延遲抽頭位置
- Minimum-input pulse width (t WI_MIN )最小輸入脈沖寬度(噸WI_MIN)
Table 2 shows some examples of the maximum allowable frequency for various nonprogrammable devices. 表2顯示了不同的最高允許的頻率不可編程器件的一些例子。
Table 2. 表2。 Maximum Input Frequencies for Nonprogrammable Delay Lines 最大輸入頻率為不可編程延時線
Part Number零件編號 | Description描述 | Delay at Maximum Tap Position在最大延遲抽頭位置 | Maximum Delay at Max Tap Position最大的最大延遲抽頭位置 | Minimum Pulse Width, t WI_MIN (ns)最小脈寬,噸WI_MIN(NS)的 | Maximum Input Frequency (MHz)最大輸入頻率(MHz) | |
DS1110LE-200 DS1110LE - 200 | 3V, 10-tap silicon delay line 3V的,10抽頭硅延遲線 | 200 200 | 200 200 | 10% of tap 10 delay 10%的自來水10延誤 | 20 20 | 25 25 |
DS1110LE-500 DS1110LE - 500 | 3V, 10-tap silicon delay line 3V的,10抽頭硅延遲線 | 500 500 | 500 500 | 10% of tap 10 delay 10%的自來水10延誤 | 50 50 | 10 10 |
DS1135-6 DS1135 - 6 | 3-in-1 high-speed silicon delay line 3合1高速硅延遲線 | 6 ± 1 6 ± 1 | 7 7 | 100% of tap delay 100%的節(jié)拍延遲 | 7 7 | 71.43 71.43 |
DS1135-30 DS1135 - 30 | 3-in-1 high-speed silicon delay line 3合1高速硅延遲線 | 30 ± 1.5 30 ± 1.5 | 31.5 31.5 | 100% of tap delay 100%的節(jié)拍延遲 | 31.5 31.5 | 15.87 15.87 |
Calculating Maximum Frequency for an Application計算應用程序最大頻率
For programmable delay lines : if a delay higher than the minimum delay is required, then the minimum pulse width allowable is calculated as:對于可編程延時線 :如果拖延高于最低延遲要求較高,則允許的最小脈沖寬度計算公式為:Minimum Pulse Width = Maximum Step-Zero Delay + Programmed Delay.最小脈沖寬度=最大步零延遲+程序延遲。
The maximum allowable frequency can then be calculated using Equation 1.最大允許的頻率可以被計算公式1。
Example for Programmable Delay Lines 示例可編程延時線
- Device used: DS1020-100設備使用:DS1020 - 100
Desired delay: 25ns期望延遲時間:25ns
Minimum pulse width = 25ns + 12ns = 37ns最小脈沖寬度= 25ns的+ 12ns = 37ns
Maximum allowable input frequency = 1/(2 × 37ns) = 18.52MHz最大允許輸入頻率= 1 /(2 × 37ns)= 18.52MHz - Device used: DS1023-500設備使用:DS1023 - 500
Desired delay: 60ns期望延遲:60納秒
Minimum pulse width = 22ns + 60ns = 82ns最小脈沖寬度= 22ns + 60納秒= 82ns
Maximum allowable input frequency = 1/(2 × 82ns) = 6.1MHz最大允許輸入頻率= 1 /(2 × 82ns)= 6.1MHz
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