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TI ADS528x 8路ADC解決方案

作者: 時(shí)間:2012-05-30 來(lái)源:網(wǎng)絡(luò) 收藏

TI 公司的是 8路高性能低功耗模數(shù)轉(zhuǎn)換器(),具有LVDS輸出和各種可編程的特性,非常適合各種高度定制化的應(yīng)用,并提供非常好的系統(tǒng)集成度。

本文引用地址:http://m.butianyuan.cn/article/198984.htm

的功耗比同類產(chǎn)品低30%,最高取樣速率65 MSPS 的每路功耗僅為77 mW。廣泛應(yīng)用在無(wú)線基站,醫(yī)療設(shè)備和測(cè)試儀表中。本文介紹了ADS528x的主要性能,功能方框圖和模擬輸入電路模型圖。

The ADS528x is a family of high-performance, low-power, octal channel analog-to-digital converters (s). Available in either a 9mm × 9mm QFN package or an HTQFP-80 package, with serialized low-voltage differential signaling (LVDS) outputs and a wide variety of programmable features, the ADS528x is highly customizable for a diversity of applications and offers an unprecedented level of system integration. An application note, XAPP774 (available at

主要特性:

·Speed and Resolution Grades:

·ADS5281: 12-bit, 50MSPS

·ADS5282: 12-bit, 65MSPS

·Power Dissipation:

·48mW/Channel at 30MSPS

·55mW/Channel at 40MSPS

·64mW/Channel at 50MSPS

·77mW/Channel at 65MSPS

·70dBFS SNR at 10MHz IF

·Analog Input Full-Scale Range: 2VPP

·Low-Frequency Noise Suppression Mode

·6dB Overload Recovery In One Clock

·External and Internal (Trimmed) Reference

·3.3V Analog Supply, 1.8V Digital Supply

·Single-Ended or Differential Clock:

·Clock Duty Cycle Correction Circuit (DCC)

·Programmable Digital Gain: 0dB to 12dB

·Serialized DDR LVDS Output

·Programmable LVDS Current Drive, Internal Termination

·Test Patterns for Enabling Output Capture

·Straight Offset Binary or Twos Complement Output

·Package Options:

·9mm × 9mm QFN-64

· HTQFP-80 PowerPAD Compatible with ADS527x Family

應(yīng)用:

·Medical Imaging

·Wireless Base-Station Infrastructure

·Test and Measurement Instrumentation

圖1 ADS528x 功能方框圖

圖2 ADS528x 模擬輸入電路模型

更多醫(yī)療電子信息請(qǐng)關(guān)注:21ic醫(yī)療電子頻道

模數(shù)轉(zhuǎn)換器相關(guān)文章:模數(shù)轉(zhuǎn)換器工作原理




關(guān)鍵詞: 528x ADS ADC

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