PIC16F877A.H頭文件詳細注釋

*Header file for the Microchip
*PIC 16F873A chip
*PIC 16F874A chip
*PIC 16F876A chip
*PIC 16F877A chip
*Midrange Microcontroller
*/

#if defined(_16F874A)|| defined(_16F877A)
#define__PINS_40
#endif

static volatile unsigned charINDF@ 0x00;//間接尋址寄存器
static volatile unsigned charTMR0@ 0x01;//定時器0
static volatile unsigned charPCL@ 0x02;//低8位程序計數(shù)器
static volatile unsigned charSTATUS@ 0x03;//程序狀態(tài)寄存器
static unsigned charFSR@ 0x04;//特殊功能寄存器
static volatile unsigned charPORTA@ 0x05;//端口A寄存器
static volatile unsigned charPORTB@ 0x06;//端口B寄存器
static volatile unsigned charPORTC@ 0x07;//端口C寄存器
#ifdef __PINS_40
static volatile unsigned charPORTD@ 0x08;//端口D寄存器
static volatile unsigned charPORTE@ 0x09;//端口E寄存器
#endif
static unsigned charPCLATH@ 0x0A;//高5位程序計數(shù)器
static volatile unsigned charINTCON@ 0x0B;//中斷控制寄存器
static volatile unsigned charPIR1@ 0x0C;//中斷標志寄存器PIR1
static volatile unsigned charPIR2@ 0x0D;//中斷標志寄存器PIR2
static volatile unsigned charTMR1L@ 0x0E;//低字節(jié)計數(shù)寄存器
static volatile unsigned charTMR1H@ 0x0F;//高字節(jié)計數(shù)寄存器
static volatile unsigned charT1CON@ 0x10;//TMR1控制寄存器
static volatile unsigned charTMR2@ 0x11;//定時/計數(shù)器TMR2
static volatile unsigned charT2CON@ 0x12;//TMR2控制寄存器
static volatile unsigned charSSPBUF@ 0x13;//收/發(fā)數(shù)據(jù)緩沖器
static volatile unsigned charSSPCON@ 0x14;//同步串口控制寄存器，對MSSP模塊的功能和指標進行設(shè)置和定義。
static volatile unsigned charCCPR1L@ 0x15;//捕獲/比較/PWM寄存器低字節(jié)
static volatile unsigned charCCPR1H@ 0x16;//捕獲/比較/PWM寄存器低字節(jié)
static volatile unsigned charCCP1CON@ 0x17;//CCP1CON寄存器
static volatile unsigned charRCSTA@ 0x18;//USART接收控制兼狀態(tài)寄存器
static volatile unsigned charTXREG@ 0x19;//USART發(fā)生緩沖器
static volatile unsigned charRCREG@ 0x1A;//USART接收緩沖器
static volatile unsigned charCCPR2L@ 0x1B;//捕獲/比較/PWM寄存器低字節(jié)
static volatile unsigned charCCPR2H@ 0x1C;//捕獲/比較/PWM寄存器低字節(jié)
static volatile unsigned charCCP2CON@ 0x1D;//CCP2CON寄存器
static volatile unsigned charADRESH@ 0x1E;//ADC轉(zhuǎn)換結(jié)果寄存器高字節(jié)
static volatile unsigned charADCON0@ 0x1F;//A/D轉(zhuǎn)換器開關(guān)位。

/*bank 1 registers */
static unsigned char bank1OPTION@ 0x81;//選擇寄存器，用于配置TMR0/WDT預分頻系數(shù)、外部INT中斷、TMR0和端口B的弱上拉。
static volatileunsigned char bank1TRISA@ 0x85;//A口方向寄存器
static volatileunsigned char bank1TRISB@ 0x86;//B口方向寄存器
static volatileunsigned char bank1TRISC@ 0x87;//C口方向寄存器
#ifdef__PINS_40
static volatile unsigned char bank1TRISD@ 0x88;//D口方向寄存器
static volatile unsigned char bank1TRISE@ 0x89;//E口方向寄存器
#endif
static volatile unsigned char bank1PIE1@ 0x8C;//中斷允許寄存器PIE1
static volatile unsigned char bank1PIE2@ 0x8D;//中斷允許寄存器PIE2
static volatile unsigned char bank1PCON@ 0x8E;//電源控制狀態(tài)寄存器
static volatile unsigned char bank1SSPCON2@ 0x91;//MSSP控制寄存器2
static volatile unsigned char bank1PR2@ 0x92;//TMR2周期寄存器
static volatile unsigned char bank1SSPADD@ 0x93;//同步串口地址寄存器
static volatile unsigned char bank1SSPSTAT@ 0x94;//同步串口狀態(tài)寄存器
static volatile unsigned char bank1TXSTA@ 0x98;//USART發(fā)生控制兼狀態(tài)寄存器
static volatile unsigned char bank1SPBRG@ 0x99;//USART波特率發(fā)生器初值寄存器
static volatile unsigned char bank1CMCON@ 0x9C;//比較控制寄存器
static volatile unsigned char bank1CVRCON@ 0x9D;//比較電壓參考控制寄存器
static volatile unsigned char bank1ADRESL@ 0x9E;//ADC轉(zhuǎn)換結(jié)果寄存器低字節(jié)
static volatile unsigned char bank1ADCON1@ 0x9F;//ADC控制寄存器ADCON1

/*bank 2 registers */
static volatile unsigned char bank2EEDATA@ 0x10C;//EEPROM數(shù)據(jù)寄存器低字節(jié)
static volatile unsigned char bank2EEADR@ 0x10D;//EEPROM地址寄存器低字節(jié)
static volatile unsigned char bank2EEDATH@ 0x10E;//EEPROM數(shù)據(jù)寄存器高字節(jié)
static volatile unsigned char bank2EEADRH@ 0x10F;//EEPROM地址寄存器高字節(jié)

/*bank 3 registers */
static volatile unsigned char bank3EECON1@ 0x18C;//EEPROM控制寄存器1
static volatile unsigned char bank3EECON2@ 0x18D;//EEPROM控制寄存器2

//*STATUS bits狀態(tài)寄存器*/
static volatile bitIRP @ (unsigned)&STATUS*8+7;//寄存器bank選擇位(用于間接尋址）。0:bank0,1;1:bank2,3
static volatile bitRP1 @ (unsigned)&STATUS*8+6;//寄存器bank選擇位(用于直接尋址）。PR1:PR0:00:BANK0;01:BANK1;10:BANK2;11BANK3.
static volatile bitRP0 @ (unsigned)&STATUS*8+5;//
static volatile bitTO@ (unsigned)&STATUS*8+4;//超時位。0：WDT超時發(fā)生；1：上電后，執(zhí)行了CLRWDT或者SLEEP指令
static volatile bitPD@ (unsigned)&STATUS*8+3;//掉電標志位。0：執(zhí)行完SLEEP指令；1：上電后或者執(zhí)行CLRWDT指令
static volatile bitZERO @ (unsigned)&STATUS*8+2;//零標志位。0：算術(shù)或邏輯操作結(jié)果不為0；1：反之。
static volatile bitDC @ (unsigned)&STATUS*8+1;//數(shù)字進位/退位標志位。0：結(jié)果的低4位沒有發(fā)生進位；1：反之。
static volatile bitCARRY @ (unsigned)&STATUS*8+0;//進位/退位標志位。0：結(jié)果的高4位沒有發(fā)生進位；1：反之。

/* PORTA bits */
static volatile bitRA5@ (unsigned)&PORTA*8+5;//RA5
static volatile bitRA4@ (unsigned)&PORTA*8+4;//RA4
static volatile bitRA3@ (unsigned)&PORTA*8+3;//RA3
static volatile bitRA2@ (unsigned)&PORTA*8+2;//RA2
static volatile bitRA1@ (unsigned)&PORTA*8+1;//RA1
static volatile bitRA0@ (unsigned)&PORTA*8+0;//RA0

/* PORTB bits */
static volatile bitRB7@ (unsigned)&PORTB*8+7;//RB7
static volatile bitRB6@ (unsigned)&PORTB*8+6;//RB6
static volatile bitRB5@ (unsigned)&PORTB*8+5;//RB5
static volatile bitRB4@ (unsigned)&PORTB*8+4;//RB4
static volatile bitRB3@ (unsigned)&PORTB*8+3;//RB3
static volatile bitRB2@ (unsigned)&PORTB*8+2;//RB2
static volatile bitRB1@ (unsigned)&PORTB*8+1;//RB1
static volatile bitRB0@ (unsigned)&PORTB*8+0;//RB0

/* PORTC bits */
static volatile bitRC7@ (unsigned)&PORTC*8+7;//RC7
static volatile bitRC6@ (unsigned)&PORTC*8+6;//RC6
static volatile bitRC5@ (unsigned)&PORTC*8+5;//RC5
static volatile bitRC4@ (unsigned)&PORTC*8+4;//RC4
static volatile bitRC3@ (unsigned)&PORTC*8+3;//RC3
static volatile bitRC2@ (unsigned)&PORTC*8+2;//RC2
static volatile bitRC1@ (unsigned)&PORTC*8+1;//RC1
static volatile bitRC0@ (unsigned)&PORTC*8+0;//RC0

/* PORTD bits */
#ifdef__PINS_40
static volatile bitRD7@ (unsigned)&PORTD*8+7;//RD7
static volatile bitRD6@ (unsigned)&PORTD*8+6;//RD6
static volatile bitRD5@ (unsigned)&PORTD*8+5;//RD5
static volatile bitRD4@ (unsigned)&PORTD*8+4;//RD4
static volatile bitRD3@ (unsigned)&PORTD*8+3;//RD3
static volatile bitRD2@ (unsigned)&PORTD*8+2;//RD2
static volatile bitRD1@ (unsigned)&PORTD*8+1;//RD1
static volatile bitRD0@ (unsigned)&PORTD*8+0;//RD0

/* PORTE bits */
static volatile bitRE2@ (unsigned)&PORTE*8+2;//RE2
static volatile bitRE1@ (unsigned)&PORTE*8+1;//RE1
static volatile bitRE0@ (unsigned)&PORTE*8+0;//RE0
#endif

//*INTCON bits 中斷控制寄存器*/
static volatile bitGIE@ (unsigned)&INTCON*8+7;//總中斷使能位。0：屏蔽所有的中斷請求；1：允許非屏蔽的中斷。
static volatile bitPEIE@ (unsigned)&INTCON*8+6;//外部中斷使能位。0：禁止；1：使能
static volatile bitT0IE@ (unsigned)&INTCON*8+5;//TMR0溢出中斷使能位。0：禁止；1：使能
static volatile bitINTE@ (unsigned)&INTCON*8+4;//RB0/INT外部中斷使能位。0：不使能；1：使能。
static volatile bitRBIE@ (unsigned)&INTCON*8+3;//RB端口變化中斷時能位。0：不使能；1：使能。
static volatile bitT0IF@ (unsigned)&INTCON*8+2;//TMR0溢出中斷標志位。0：無溢出；1：溢出。
static volatile bitINTF@ (unsigned)&INTCON*8+1;//RB0/INT外部中斷標志位。0：RB0外部中斷未發(fā)生；1：RB0外部中斷發(fā)生。
static volatile bitRBIF@ (unsigned)&INTCON*8+0;//RB端口變化中斷標志位。0：RB口無變化；1：RB口至少有一個引腳變化。
// alternate definitions
static volatile bitTMR0IE@ (unsigned)&INTCON*8+5;//
static volatile bitTMR0IF@ (unsigned)&INTCON*8+2;//

//*PIR1 bits中斷標志寄存器PIR1*/
#ifdef__PINS_40
static volatile bitPSPIF@ (unsigned)&PIR1*8+7;//并行從端口讀寫中斷標志位。0：沒有讀寫操作發(fā)生；1：反之
#endif
static volatile bitADIF@ (unsigned)&PIR1*8+6;//A/D轉(zhuǎn)換器中斷標志位。0：A/D轉(zhuǎn)換沒有完成；1：A/D轉(zhuǎn)換完成。
static volatile bitRCIF@ (unsigned)&PIR1*8+5;//USART接收中斷標志位。0：接收緩沖器空；1：反之。
static volatile bitTXIF@ (unsigned)&PIR1*8+4;//USART發(fā)送中斷標志位。0：發(fā)生緩沖器滿；1：反之。
static volatile bitSSPIF@ (unsigned)&PIR1*8+3;//同步串行端口（ssp）中斷標志位。0：沒有ssp中斷條件發(fā)生；
static volatile bitCCP1IF@ (unsigned)&PIR1*8+2;//CCP1中斷標志位。
static volatile bitTMR2IF@ (unsigned)&PIR1*8+1;//TMR2 TO PR2匹配中斷標志位。0：沒有匹配發(fā)生
static volatile bitTMR1IF@ (unsigned)&PIR1*8+0;//TMR1溢出中斷標志位，0：無溢出

/*PIR2 bits*/
static volatile bitCMIF@ (unsigned)&PIR2*8+6;//比較器中斷標志位；0：比較器輸入沒有改變
static volatile bitEEIF@ (unsigned)&PIR2*8+4;//EEPROM寫操作中斷標志位。0：寫操作沒有完成或沒有開始
static volatile bitBCLIF@ (unsigned)&PIR2*8+3;//總線沖突中斷標志位。0：沒有總線沖突發(fā)生
static volatile bitCCP2IF@ (unsigned)&PIR2*8+0;//CCP2中斷標志位

//*T1CON bitsTMR1控制寄存器*/
static volatile bitT1CKPS1@ (unsigned)&T1CON*8+5;//TMR1輸入時鐘預分頻選擇位
static volatile bitT1CKPS0@ (unsigned)&T1CON*8+4;//TMR1輸入時鐘預分頻選擇位
static volatile bitT1OSCEN@ (unsigned)&T1CON*8+3;//TMR1震蕩器使能控制位。0：振蕩器關(guān)閉
static volatile bitT1SYNC @ (unsigned)&T1CON*8+2;//TMR1外部時鐘輸入同步控制位。
static volatile bitTMR1CS @ (unsigned)&T1CON*8+1;//TMR1時鐘源選擇位。0：內(nèi)部時鐘的/4
static volatile bitTMR1ON @ (unsigned)&T1CON*8+0;//TMR1使能位。0：禁止

//*T2CON bits TMR2控制寄存器*/
static volatile bitTOUTPS3@ (unsigned)&T2CON*8+6;//TMR2后分頻選擇位。
static volatile bitTOUTPS2@ (unsigned)&T2CON*8+5;//TMR2后分頻選擇位
static volatile bitTOUTPS1@ (unsigned)&T2CON*8+4;//TMR2后分頻選擇位
static volatile bitTOUTPS0@ (unsigned)&T2CON*8+3;//TMR2后分頻選擇位。
static volatile bitTMR2ON @ (unsigned)&T2CON*8+2;//TMR2使能位。
static volatile bitT2CKPS1@ (unsigned)&T2CON*8+1;//TMR2預分頻選擇位。
static volatile bitT2CKPS0@ (unsigned)&T2CON*8+0;//TMR2預分頻選擇位

//*SSPCON bitsSPI同步串口控制寄存器*/
static volatile bitWCOL@ (unsigned)&SSPCON*8+7;//寫操作沖突檢測位，在SPI從動方式下，WCOL=0，未發(fā)生沖突，WCOL=1,發(fā)生沖突。
static volatile bitSSPOV@ (unsigned)&SSPCON*8+6;//接收溢出標志位，SSPOV=0，未發(fā)生接收溢出；SSPOV=1,發(fā)生接受溢出。
static volatile bitSSPEN@ (unsigned)&SSPCON*8+5;//同步串口MSSP允許位，SSPEN=0，關(guān)閉串口；SSPEN=1，允許串行端口功能。
static volatile bitCKP@ (unsigned)&SSPCON*8+4;//時鐘極性選擇位，CKP=0，空閑時時鐘停留在低電平；CKP=1，空閑時時鐘停留在高電平。
static volatile bitSSPM3@ (unsigned)&SSPCON*8+3;//同步串行口MSSP方式選擇位，主動參數(shù)。0，1，2，3，4.
static volatile bitSSPM2@ (unsigned)&SSPCON*8+2;
static volatile bitSSPM1@ (unsigned)&SSPCON*8+1;
static volatile bitSSPM0@ (unsigned)&SSPCON*8+0;

/*CCP1CON bits*/
static volatile bitCCP1X@ (unsigned)&CCP1CON*8+5;//PWM最小信號位
static volatile bitCCP1Y@ (unsigned)&CCP1CON*8+4;//PWM最小信號位
static volatile bitCCP1M3@ (unsigned)&CCP1CON*8+3;//CCP1模式選擇位
static volatile bitCCP1M2@ (unsigned)&CCP1CON*8+2;//CCP1模式選擇位
static volatile bitCCP1M1@ (unsigned)&CCP1CON*8+1;//CCP1模式選擇位
static volatile bitCCP1M0@ (unsigned)&CCP1CON*8+0;//CCP1模式選擇位

//*RCSTA bitsUSART接收控制兼狀態(tài)寄存器 */
static volatile bitSPEN@ (unsigned)&RCSTA*8+7;//串行端口使能位。0：禁止；1：使能。
static volatile bitRX9 @ (unsigned)&RCSTA*8+6;//接收數(shù)據(jù)長度選擇位。0：接收8位數(shù)據(jù)；1：接收9位
static volatile bitSREN@ (unsigned)&RCSTA*8+5;//單字節(jié)使能選擇位。0：禁止；1：使能。異步模式未使用
static volatile bitCREN@ (unsigned)&RCSTA*8+4;//連續(xù)接收使能選擇位。0：禁止連續(xù)接收使能
static volatile bitADDEN@ (unsigned)&RCSTA*8+3;//地址匹配檢測使能位。0：取消地址匹配檢測
static volatile bitFERR@ (unsigned)&RCSTA*8+2;//幀格式錯誤標志位。0：未發(fā)生錯誤
static volatile bitOERR@ (unsigned)&RCSTA*8+1;//溢出標志位。0：未溢出
static volatile bitRX9D@ (unsigned)&RCSTA*8+0;//接收數(shù)據(jù)的第9位

/*CCP2CON bits*/
static volatile bitCCP2X@ (unsigned)&CCP2CON*8+5;//PWM最小信號位
static volatile bitCCP2Y@ (unsigned)&CCP2CON*8+4;//PWM最小信號位
static volatile bitCCP2M3@ (unsigned)&CCP2CON*8+3;//CCP2模式選擇位
static volatile bitCCP2M2@ (unsigned)&CCP2CON*8+2;//CCP2模式選擇位
static volatile bitCCP2M1@ (unsigned)&CCP2CON*8+1;//CCP2模式選擇位
static volatile bitCCP2M0@ (unsigned)&CCP2CON*8+0;//CCP2模式選擇位

//* ADCON0 bitsA/D控制寄存器位 */
static volatile bitADCS1@ (unsigned)&ADCON0*8+7;//選擇A/D轉(zhuǎn)換時鐘。00：1/2;01:1/8;10:1/32;11:RC
static volatile bitADCS0 @ (unsigned)&ADCON0*8+6;//選擇A/D轉(zhuǎn)換時鐘
static volatile bitCHS2@ (unsigned)&ADCON0*8+5;//AD模擬通道選擇
static volatile bitCHS1@ (unsigned)&ADCON0*8+4;//AD模擬通道選擇
static volatile bitCHS0@ (unsigned)&ADCON0*8+3;//AD模擬通道選擇。000：選擇信道0.
static volatile bitADGO@ (unsigned)&ADCON0*8+2;//A/D轉(zhuǎn)換狀態(tài)位,ADON=1時，0：不在進行ad轉(zhuǎn)換；1：正在進行轉(zhuǎn)換。
static volatile bitADON@ (unsigned)&ADCON0*8+0;//A/D轉(zhuǎn)換器開關(guān)位，0：關(guān)閉；1：啟動。

//* OPTION bits 選擇寄存器 */
static bank1 bitRBPU@ (unsigned)&OPTION*8+7;//端口B上拉設(shè)置允許位
static bank1 bitINTEDG@ (unsigned)&OPTION*8+6;//外中斷源選擇位
static bank1 bitT0CS@ (unsigned)&OPTION*8+5;//時鐘選擇位。T0CS=0，使用內(nèi)部時鐘；T0CS=1，使用外部時鐘。
static bank1 bitT0SE@ (unsigned)&OPTION*8+4;//計數(shù)器使用外部時鐘，T0SE=0，上升沿觸發(fā)；T0SE=1，下降沿觸發(fā)。
static bank1 bitPSA@ (unsigned)&OPTION*8+3;//PSA=0，作為time0的預分頻器；PSA=1，作為WDT的后分頻器。
static bank1 bitPS2@ (unsigned)&OPTION*8+2;//PS2,PS1,PS0。預分頻比例。000=1：2（Timer0)1:1(WDT)...
static bank1 bitPS1@ (unsigned)&OPTION*8+1;//
static bank1 bitPS0@ (unsigned)&OPTION*8+0;//

//* TRISA bits PORTA數(shù)據(jù)方向寄存器 */
static volatile bank1 bitTRISA5@ (unsigned)&TRISA*8+5;//
static volatile bank1 bitTRISA4@ (unsigned)&TRISA*8+4;//
static volatile bank1 bitTRISA3@ (unsigned)&TRISA*8+3;//
static volatile bank1 bitTRISA2@ (unsigned)&TRISA*8+2;//
static volatile bank1 bitTRISA1@ (unsigned)&TRISA*8+1;//
static volatile bank1 bitTRISA0@ (unsigned)&TRISA*8+0;//

//* TRISB bits PORTB數(shù)據(jù)方向寄存器 */
static volatile bank1 bitTRISB7@ (unsigned)&TRISB*8+7;//
static volatile bank1 bitTRISB6@ (unsigned)&TRISB*8+6;//
static volatile bank1 bitTRISB5@ (unsigned)&TRISB*8+5;//
static volatile bank1 bitTRISB4@ (unsigned)&TRISB*8+4;//
static volatile bank1 bitTRISB3@ (unsigned)&TRISB*8+3;//
static volatile bank1 bitTRISB2@ (unsigned)&TRISB*8+2;//
static volatile bank1 bitTRISB1@ (unsigned)&TRISB*8+1;//
static volatile bank1 bitTRISB0@ (unsigned)&TRISB*8+0;//

//* TRISC bits PORTC數(shù)據(jù)方向寄存器 */
static volatile bank1 bitTRISC7@ (unsigned)&TRISC*8+7;//
static volatile bank1 bitTRISC6@ (unsigned)&TRISC*8+6;//
static volatile bank1 bitTRISC5@ (unsigned)&TRISC*8+5;//
static volatile bank1 bitTRISC4@ (unsigned)&TRISC*8+4;//
static volatile bank1 bitTRISC3@ (unsigned)&TRISC*8+3;//
static volatile bank1 bitTRISC2@ (unsigned)&TRISC*8+2;//
static volatile bank1 bitTRISC1@ (unsigned)&TRISC*8+1;//
static volatile bank1 bitTRISC0@ (unsigned)&TRISC*8+0;//

#ifdef__PINS_40
//* TRISD bits PORTD數(shù)據(jù)方向寄存器 */
static volatile bank1 bitTRISD7@ (unsigned)&TRISD*8+7;//
static volatile bank1 bitTRISD6@ (unsigned)&TRISD*8+6;//
static volatile bank1 bitTRISD5@ (unsigned)&TRISD*8+5;//
static volatile bank1 bitTRISD4@ (unsigned)&TRISD*8+4;//
static volatile bank1 bitTRISD3@ (unsigned)&TRISD*8+3;//
static volatile bank1 bitTRISD2@ (unsigned)&TRISD*8+2;//
static volatile bank1 bitTRISD1@ (unsigned)&TRISD*8+1;//
static volatile bank1 bitTRISD0@ (unsigned)&TRISD*8+0;//

//* TRISE bits PORTE數(shù)據(jù)方向寄存器 */
static volatile bank1 bitIBF@ (unsigned)&TRISE*8+7;//
static volatile bank1 bitOBF@ (unsigned)&TRISE*8+6;//
static volatile bank1 bitIBOV@ (unsigned)&TRISE*8+5;//
static volatile bank1 bitPSPMODE@ (unsigned)&TRISE*8+4;//

static volatile bank1 bitTRISE2 @ (unsigned)&TRISE*8+2;//
static volatile bank1 bitTRISE1 @ (unsigned)&TRISE*8+1;//
static volatile bank1 bitTRISE0 @ (unsigned)&TRISE*8+0;//
#endif

//*PIE1 bits 外圍中斷獨立使能位*/
#ifdef__PINS_40
static volatile bank1 bitPSPIE@ (unsigned)&PIE1*8+7;//并行從端口讀寫中斷使能位。0：禁止psp讀寫中斷
#endif
static volatile bank1 bitADIE@ (unsigned)&PIE1*8+6;//A/D轉(zhuǎn)換器中斷標志位。0：A/D轉(zhuǎn)換沒有完成；1：A/D轉(zhuǎn)換完成。
static volatile bank1 bitRCIE@ (unsigned)&PIE1*8+5;//USART接收中斷標志位。0：接收緩沖器空；1：反之。
static volatile bank1 bitTXIE@ (unsigned)&PIE1*8+4;////USART發(fā)送中斷標志位。0：發(fā)生緩沖器滿；1：反之。
static volatile bank1 bitSSPIE@ (unsigned)&PIE1*8+3;//同步串行端口中斷使能位
static volatile bank1 bitCCP1IE@ (unsigned)&PIE1*8+2;//CCP1中斷使能位
static volatile bank1 bitTMR2IE@ (unsigned)&PIE1*8+1;//TMR2 TO PR2匹配中斷標志位。0：沒有匹配發(fā)生
static volatile bank1 bitTMR1IE@ (unsigned)&PIE1*8+0;//TMR1溢出中斷標志位，0：無溢出

/*PIE2 bits*/
static volatile bank1 bitCMIE@ (unsigned)&PIE2*8+6;//比較器中斷使能位
static volatile bank1 bitEEIE@ (unsigned)&PIE2*8+4;//EEPROM寫操作中斷使能位
static volatile bank1 bitBCLIE@ (unsigned)&PIE2*8+3;//總線沖突中斷使能位
static volatile bank1 bitCCP2IE@ (unsigned)&PIE2*8+0;//CCP2中斷使能位

//*PCON bits 電源控制寄存器*/
static volatile bank1 bitPOR@ (unsigned)&PCON*8+1;//上電復位狀態(tài)位
static volatile bank1 bitBOR@ (unsigned)&PCON*8+0;//掉電復位狀態(tài)位

//*SSPCON2 bits MSSP控制寄存器2*/
static volatile bank1 bitGCEN@ (unsigned)&SSPCON2*8+7;//總調(diào)用使能位
static volatile bank1 bitACKSTAT@ (unsigned)&SSPCON2*8+6;//應(yīng)答狀態(tài)位
static volatile bank1 bitACKDT@ (unsigned)&SSPCON2*8+5;//應(yīng)答數(shù)據(jù)位
static volatile bank1 bitACKEN@ (unsigned)&SSPCON2*8+4;//應(yīng)答順序使能位
static volatile bank1 bitRCEN@ (unsigned)&SSPCON2*8+3;//接收使能位
static volatile bank1 bitPEN@ (unsigned)&SSPCON2*8+2;//停止條件使能位
static volatile bank1 bitRSEN@ (unsigned)&SSPCON2*8+1;//重復開始條件使能位
static volatile bank1 bitSEN@ (unsigned)&SSPCON2*8+0;//開始條件使能位

//* SSPSTAT bits SPI同步串口狀態(tài)寄存器 */
static volatile bank1 bitSTAT_SMP@ (unsigned)&SSPSTAT*8+7;//SPI采樣控制位。SPI主控方式，STAT_SMP=0,在輸出的數(shù)據(jù)中間采樣輸入數(shù)據(jù)，為1時，在末端采樣；SPI從動方式，STAT_SMP必須置位。
static volatile bank1 bitSTAT_CKE@ (unsigned)&SSPSTAT*8+6;//SPI時鐘沿選擇,CKP=0時，STAT_CKE=0,SCK下降沿發(fā)送數(shù)據(jù)，STAT_CKE=1,SCK上升沿發(fā)送數(shù)據(jù)。CKP=1時，反之。
static volatile bank1 bitSTAT_DA@ (unsigned)&SSPSTAT*8+5;//數(shù)據(jù)/地址位
static volatile bank1 bitSTAT_P@ (unsigned)&SSPSTAT*8+4;//停止位
static volatile bank1 bitSTAT_S@ (unsigned)&SSPSTAT*8+3;//開始位
static volatile bank1 bitSTAT_RW@ (unsigned)&SSPSTAT*8+2;//讀寫位信息
static volatile bank1 bitSTAT_UA@ (unsigned)&SSPSTAT*8+1;//更新地址位
static volatile bank1 bitSTAT_BF@ (unsigned)&SSPSTAT*8+0;//緩沖器滿標志位。STAT_BF=0，緩沖器空；STAT_BF=1，緩沖器滿。

//*TXSTA bitsUSART發(fā)送控制兼狀態(tài)寄存器*/
static volatile bank1 bitCSRC@ (unsigned)&TXSTA*8+7;//同步時鐘選擇位。0：選外部時鐘；1：選內(nèi)部時鐘。異步模式未用。
static volatile bank1 bitTX9@ (unsigned)&TXSTA*8+6;//發(fā)生長度選擇位。0：發(fā)送8位數(shù)據(jù)；1：發(fā)送9位
static volatile bank1 bitTXEN@ (unsigned)&TXSTA*8+5;//發(fā)生使能選擇位。0：禁止發(fā)送；1：使能發(fā)生
static volatile bank1 bitSYNC@ (unsigned)&TXSTA*8+4;//同步/異步模式選擇位。0：異步；1：同步
static volatile bank1 bitBRGH@ (unsigned)&TXSTA*8+2;//高速波特率選擇位。0：低速；1：高速。
static volatile bank1 bitTRMT@ (unsigned)&TXSTA*8+1;//移位寄存器空標志位。0，發(fā)生移位寄存器滿，1，為空。
static volatile bank1 bitTX9D@ (unsigned)&TXSTA*8+0;//發(fā)生第9位的選擇位，0,不發(fā)生，1，發(fā)送。

//*CMCON Bits 比較器控制寄存器*/
static volatile bank1 bitC2OUT@ (unsigned)&CMCON*8+7;//比較器2輸出位
static volatile bank1 bitC1OUT@ (unsigned)&CMCON*8+6;//比較器1輸出位
static volatile bank1 bitC2INV@ (unsigned)&CMCON*8+5;//比較器3輸出反向位
static volatile bank1 bitC1INV@ (unsigned)&CMCON*8+4;//比較器1輸出反向位
static volatile bank1 bitCIS@ (unsigned)&CMCON*8+3;//比較器輸入開關(guān)位
static volatile bank1 bitCM2@ (unsigned)&CMCON*8+2;//比較器模式位
static volatile bank1 bitCM1@ (unsigned)&CMCON*8+1;//比較器模式位
static volatile bank1 bitCM0@ (unsigned)&CMCON*8+0;//比較器模式位

//*CVRCON Bits 比較電壓參考寄存器*/
static volatile bank1 bitCVREN@ (unsigned)&CVRCON*8+7;//比較器電壓參考使能位
static volatile bank1 bitCVROE@ (unsigned)&CVRCON*8+6;//比較器Vref輸出使能位
static volatile bank1 bitCVRR@ (unsigned)&CVRCON*8+5;//比較器Vref范圍選擇位
static volatile bank1 bitCVR3@ (unsigned)&CVRCON*8+3;//比較器Vref值選擇位
static volatile bank1 bitCVR2@ (unsigned)&CVRCON*8+2;//比較器Vref值選擇位
static volatile bank1 bitCVR1@ (unsigned)&CVRCON*8+1;//比較器Vref值選擇位
static volatile bank1 bitCVR0@ (unsigned)&CVRCON*8+0;//比較器Vref值選擇位

//*ADCON1 bitsADC控制寄存器ADCON1*/
static volatile bank1 bitADFM@ (unsigned)&ADCON1*8+7;//AD轉(zhuǎn)換結(jié)果格式選擇位
static volatile bank1 bitADCS2@ (unsigned)&ADCON1*8+6;//AD轉(zhuǎn)換時鐘選擇位
static volatile bank1 bitPCFG3@ (unsigned)&ADCON1*8+3;//PCFG3-PCFG0AD轉(zhuǎn)換引腳功能選擇位。詳細意義見手冊PAGE-130.
static volatile bank1 bitPCFG2@ (unsigned)&ADCON1*8+2;
static volatile bank1 bitPCFG1@ (unsigned)&ADCON1*8+1;
static volatile bank1 bitPCFG0@ (unsigned)&ADCON1*8+0;

//*EECON1 bits EEPROM控制寄存器*/
static volatile bank3 bitEEPGD@ (unsigned)&EECON1*8+7;//程序/數(shù)據(jù)EEPROM選擇位。0：選擇訪問數(shù)據(jù)存儲器
static volatile bank3 bitWRERR@ (unsigned)&EECON1*8+3;//EEPROM錯誤標志位。0：寫操作完成
static volatile bank3 bitWREN@ (unsigned)&EECON1*8+2;//EEPROM寫使能位。1：允許
static volatile bank3 bitWR@ (unsigned)&EECON1*8+1;//寫控制位
static volatile bank3 bitRD@ (unsigned)&EECON1*8+0;//讀控制位

#define CONFIG_ADDR0x2007

/*osc configurations*/
#define RC0x3FFF// resistor/capacitor RC振蕩器
#define HS0x3FFE// high speed crystal/resonator
#define XT0x3FFD// crystal/resonator
#define LP0x3FFC// low power crystal/resonator

/*watchdog*/
#define WDTEN0x3FFF// enable watchdog timer
#define WDTDIS0x3FFB// disable watchdog timer

/*power up timer*/
#define PWRTEN0x3FF7// enable power up timer
#define PWRTDIS0x3FFF// disable power up timer

/*brown out reset*/
#define BOREN0x3FFF// enable brown out reset
#define BORDIS0x3FBF// disable brown out reset

/*Low Voltage Programmable*/
#define LVPEN0x3FFF// low voltage programming enabled
#define LVPDIS0x3F7F// low voltage programming disabled

/*data code protected*/
#define DP0x3EFF// protect data code
// alternately
#define DPROT0x3EFF// use DP
#define DUNPROT0x3FFF// use UNPROTECT

/* Flash memory write enable/protect */
#define WRTEN0x3FFF/* flash memory write enabled */
#define WP10x3DFF /* protect 0000 - 00FF */
#define WP20x3BFF /* protect 0000 - 07FF(76A/77A) / 03FF(73A/74A) */
#define WP30x39FF /* protect 0000 - 1FFF(76A/77A) / 0FFF(73A/74A) */

/*debug option*/
#define DEBUGEN0x37FF// debugger enabled
#define DEBUGDIS0x3FFF// debugger disabled

/*code protection*/
#define PROTECT0x1FFF/* protect program code */
#define UNPROTECT0x3FFF/* do not protect the code */