關(guān)于啟動(dòng)代碼2440init.s（三）

;=======================================================================
; 哈哈,下面又有看頭了,這個(gè)初始化程序好像被名曰hzh的高手改過(guò)
; 能在NOR NAND 還有內(nèi)存中運(yùn)行,當(dāng)然了,在內(nèi)存中運(yùn)行最簡(jiǎn)單了.
; 在NOR NAND中運(yùn)行的話都要先把自己拷到內(nèi)存中.
; 此外,還記得上面提到的|Image$$RO$$Base|,|Image$$RO$$Limit|...嗎?
; 這就是拷貝的依據(jù)了!!!
;=========================================================================

;BWSCON的[2:1]反映了外部引腳OM[1:0]:若OM[1:0] != 00, 從NOR FLash啟動(dòng)或直接在內(nèi)存運(yùn)行；若OM[1:0]==00，則為Nand Flash Mode
ldr r0, =BWSCON
ldr r0, [r0]
ands r0, r0, #6 ; #6 == 0110 --> BWSCON[2:1]
bne copy_proc_beg ;OM[1:0] != 00，NOR FLash boot，不讀取NAND FLASH

adr r0, ResetEntry ;否則,OM[1:0] == 0, 為從NAND FLash啟動(dòng)
cmp r0, #0 ;再比較入口是否為0地址處
;如果是0才是真正從NAND 啟動(dòng)，因?yàn)槠?k被復(fù)制到0地址開(kāi)始的stepingstone 內(nèi)部sram中
; 注意adr得到的是 相對(duì) 地址，非絕對(duì)地址 == if use Multi-ice,
bne copy_proc_beg ;如果!=0,說(shuō)明在using ice, 這種情況也不讀取NAND FLASH. dont read nand flash for boot
;nop


;==============這一段代碼完成從NAND Flash讀代碼到RAM=====================
nand_boot_beg ;
mov r5, #NFCONF ;首先設(shè)定NAND的一些控制寄存器
;set timing value
ldr r0, =(7<<12)|(7<<8)|(7<<4)
str r0, [r5]
;enable control
ldr r0, =(0<<13)|(0<<12)|(0<<10)|(0<<9)|(0<<8)|(1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0)
str r0, [r5, #4]
bl ReadNandID ;按著讀取NAND的ID號(hào),結(jié)果保存在r5里
mov r6, #0 ;r6設(shè)初值0.
ldr r0, =0xec73 ;期望的NAND ID號(hào)
cmp r5, r0 ;這里進(jìn)行比較
beq ? ;相等的話就跳到下一個(gè)1標(biāo)號(hào)處
ldr r0, =0xec75 ;這是另一個(gè)期望值
cmp r5, r0
beq ? ;相等的話就跳到下一個(gè)1標(biāo)號(hào)處
mov r6, #1 ;不相等,設(shè)置r6=1.
1
bl ReadNandStatus ;讀取NAND狀態(tài),結(jié)果放在r1里
mov r8, #0 ; r8設(shè)初值0,意義為頁(yè)號(hào)
ldr r9, =ResetEntry ; r9設(shè)初值為初始化程序入口地址
; 注意,在這里使用的是ldr偽指令,而不是上面用的adr偽指令,它加載的是ResetEntry
; 的絕對(duì)地址,也就是我們期望的RAM中的地址,在這里,它和|Image$$RO$$Base|一樣
; 也就是說(shuō),我如我們編譯程序時(shí)RO base指定的地址在RAM里,而把生成的文件拷到
; NAND里運(yùn)行,由ldr加載的r9的值還是定位在內(nèi)存. ???

2
ands r0, r8, #0x1f ;凡r8為0x1f(32)的整數(shù)倍-1,eq有效,ne無(wú)效
bne ? ;這句的意思是對(duì)每個(gè)塊(32頁(yè))進(jìn)行檢錯(cuò) -- 在每個(gè)塊的開(kāi)始頁(yè)進(jìn)行
mov r0, r8 ;r8->r0
bl CheckBadBlk ;檢查NAND的壞區(qū)
cmp r0, #0 ;比較r0和0
addne r8, r8, #32 ;存在壞塊的話就跳過(guò)這個(gè)壞塊: + 32得到下一塊. 故: r8 = blockpage addr，因?yàn)樽x寫(xiě)是按頁(yè)進(jìn)行的(每頁(yè)512Byte)
bne ? ;然后跳到4進(jìn)行循環(huán)條件判斷。沒(méi)有的話就跳到標(biāo)號(hào)3處copy當(dāng)前頁(yè)
3
mov r0, r8 ;當(dāng)前頁(yè)號(hào)->r0
mov r1, r9 ;當(dāng)前目標(biāo)地址->r1
bl ReadNandPage ;讀取該頁(yè)的NAND數(shù)據(jù)到RAM
add r9, r9, #512 ;每一頁(yè)的大小是512Bytes
add r8, r8, #1 ;r8指向下一頁(yè)
4
cmp r8, #256 ;比較是否讀完256頁(yè)即128KBytes
;注意：這說(shuō)明此程序默認(rèn)拷貝128KByte的代碼(by Tinko)

bcc ? ;如果r8小于256(沒(méi)讀完),就返回前面的標(biāo)號(hào)2處
; now copy completed
mov r5, #NFCONF ;Disable NandFlash
ldr r0, [r5, #4]
bic r0, r0, #1
str r0, [r5, #4]

ldr pc, =copy_proc_beg ;調(diào)用copy_proc_beg
;個(gè)人認(rèn)為應(yīng)該為InitRam ?????????????????????????????



;===========================================================
copy_proc_beg
adrl r0, ResetEntry ;ResetEntry值->r0
;這里應(yīng)該注意，使用的是adr，而不是ldr。使用ldr說(shuō)明ResetEntry是個(gè)絕對(duì)地址，這個(gè)地址是在程序鏈接的時(shí)候
;確定的。而使用adr則說(shuō)明ResetEntry的地址和當(dāng)前代碼的執(zhí)行位置有關(guān)，它是一個(gè)相對(duì)的地址。比如這段代碼
;在stepingstone里面執(zhí)行，那么ResetEntry的地址就是零。如果在RAM里執(zhí)行，那么ResetEntry就應(yīng)是ＲＡＭ的一個(gè)
;地址，應(yīng)該等于RO base。
ldr r2, BaseOfROM ;BaseOfROM值(后面有定義)->r2
cmp r0, r2 ;比較 ResetEntry 和 BaseOfROM
ldreq r0, TopOfROM ;如果相等的話(在內(nèi)存運(yùn)行 --- ice -- 無(wú)需復(fù)制code區(qū)中的ro段，但需要復(fù)制code區(qū)中的rw段),TopOfROM->r0
beq InitRam ;同時(shí)跳到InitRam
;否則，下面開(kāi)始復(fù)制code的RO段
;=========================================================
;下面這個(gè)是針對(duì)代碼在NOR FLASH時(shí)的拷貝方法
;功能為把從ResetEntry起,TopOfROM-BaseOfROM大小的數(shù)據(jù)拷到BaseOfROM
;TopOfROM和BaseOfROM為|Image$$RO$$Limit|和|Image$$RO$$Base|
;|Image$$RO$$Limit|和|Image$$RO$$Base|由連接器生成
;為生成的代碼的代碼段運(yùn)行時(shí)的起啟和終止地址
;BaseOfBSS和BaseOfZero為|Image$$RW$$Base|和|Image$$ZI$$Base|
;|Image$$RW$$Base|和|Image$$ZI$$Base|也是由連接器生成
;兩者之間就是初始化數(shù)據(jù)的存放地
; --在加載階段，不存在ZI區(qū)域--
;=======================================================
ldr r3, TopOfROM
0
ldmia r0!, {r4-r7} ;開(kāi)始時(shí)，r0 = ResetEntry --- source
stmia r2!, {r4-r7} ;開(kāi)始時(shí)，r2 = BaseOfROM --- destination
cmp r2, r3 ;終止條件：復(fù)制了TopOfROM-BaseOfROM大小
bcc ?

;---------------------------------------------------------------
; 下面2行，根據(jù)理解，由tinko添加
; 猜測(cè)上面的代碼不應(yīng)該用" ! "，以至于地址被修改。這里重新賦值
;---------------------------------------------------------------
adrl r0, ResetEntry ;dont use adr, cause out of range error occures
ldr r2, BaseOfROM
;旨在計(jì)算出正確的RW區(qū)起始位置
; 下面2行目的是為了計(jì)算正確的r0（必須使之指向code區(qū)中的rw域開(kāi)始處）
sub r2, r2, r3 ;r2=BaseOfROM-TopOfROM=(-)代碼長(zhǎng)度
sub r0, r0, r2 ;r0=ResetEntry-(-)代碼長(zhǎng)度=ResetEntry+代碼長(zhǎng)度

InitRam
;復(fù)制代碼加載位置中的RM區(qū)到|Image$$RW$$Base|
ldr r2, BaseOfBSS ;BaseOfBSS->r2 , BaseOfBSS = |Image$$RW$$Base|
ldr r3, BaseOfZero ;BaseOfZero->r3 , BaseOfZero = |Image$$ZI$$Base|
0
cmp r2, r3 ;比較BaseOfBSS和BaseOfZero
ldrcc r1, [r0], #4 ;當(dāng)代碼在內(nèi)存中運(yùn)行時(shí)，r0(初始值) = TopOfROM.這之后的BaseOfZero-BaseOfBSS仍屬于code，需拷貝到BaseOfBSS
strcc r1, [r2], #4
bcc ?

;用0初始化ZI區(qū)
mov r0, #0
ldr r3, EndOfBSS ;EndOfBSS = |Image$$ZI$$Limit|
1
cmp r2, r3
strcc r0, [r2], #4
bcc ?

;要是r21 ; means Fclk:Hclk is not 1:1.
; bl MMU_SetAsyncBusMode
; |
; bl MMU_SetFastBusMode ; default value.
; ]
;bl Led_Test
;===========================================================

; 進(jìn)入C語(yǔ)言前的最后一步了,就是把我們用說(shuō)查二級(jí)向量表
; 的中斷例程安裝到一級(jí)向量表(異常向量表)里.
;//5.設(shè)置缺省中斷處理函數(shù)
; Setup IRQ handler
ldr r0,=HandleIRQ ;This routine is needed
ldr r1,=IsrIRQ ;if there isnt subs pc,lr,#4 at 0x18, 0x1c
str r1,[r0]
;//initialize the IRQ 將普通中斷判斷程序的入口地址給HandleIRQ

;//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
;注意，以下這段可能不需要!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
;//6.將數(shù)據(jù)段拷貝到ram中 將零初始化數(shù)據(jù)段清零跳入C語(yǔ)言的main函數(shù)執(zhí)行到這步結(jié)束bootloader初步引導(dǎo)結(jié)束
;If main() is used, the variable initialization will be done in __main().
[ {FALSE} ;by tinko -- 最外面的條件由tinko添加，實(shí)際上不再執(zhí)行這段
[ :LNOT:USE_MAIN ;initialized {FALSE}
;Copy and paste RW data/zero initialized data

LDR r0, =|Image$$RO$$Limit| ; Get pointer to ROM data
LDR r1, =|Image$$RW$$Base| ; and RAM copy
LDR r3, =|Image$$ZI$$Base|

;Zero init base => top of initialised data
CMP r0, r1 ; Check that they are different just for debug??????????????????????????
BEQ ?
1
CMP r1, r3 ; Copy init data
LDRCC r2, [r0], #4 ;--> LDRCC r2, [r0] + ADD r0, r0, #4
STRCC r2, [r1], #4 ;--> STRCC r2, [r1] + ADD r1, r1, #4
BCC ?
2
LDR r1, =|Image$$ZI$$Limit| ; Top of zero init segment
MOV r2, #0
3
CMP r3, r1 ; Zero init
STRCC r2, [r3], #4
BCC ?
]
]
;!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!

;***************************************
;by tinko
[ {TRUE} ;得有些表示了,該點(diǎn)點(diǎn)LED燈了
;rGPFDAT = (rGPFDAT & ~(0xf<<4)) | ((~data & 0xf)<<4);
; Led_Display
ldr r0,=GPFCON
ldr r1,=0x5500
str r1,[r0]
ldr r0,=GPFDAT
ldr r1,=0xe0
str r1,[r0]

ldr r2, =0xffffffff;
1
sub r2,r2,#1
bne ?
ldr r0,=GPFDAT
ldr r1,=0xe0
;b . ;die here
]
;*****************************************
;*****************************************************************************
;!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
; 媽呀,終說(shuō)見(jiàn)到艷陽(yáng)天了!!!!!!!!!!
; 跳到C語(yǔ)言的main函數(shù)處了.
;!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
;*****************************************************************************

[ :LNOT:THUMBCODE ;if thumbcode={false} bl main L代表logic變量
bl Main ;Dont use main() because ......
b . ;注意小圓點(diǎn)
]

;//if thumbcod={ture}
[ THUMBCODE ;for start-up code for Thumb mode
orr lr,pc,#1
bx lr
CODE16
bl Main ;Dont use main() because ......
b . ;注意小圓點(diǎn)
CODE32
]

;function initializing stacks
InitStacks
;Dont use DRAM,such as stmfd,ldmfd......
;SVCstack is initialized before
;Under toolkit ver 2.5, msr cpsr,r1 can be used instead of msr cpsr_cxsf,r1

mrs r0,cpsr
bic r0,r0,#MODEMASK
orr r1,r0,#UNDEFMODE|NOINT
msr cpsr_cxsf,r1 ;UndefMode
ldr sp,=UndefStack ; UndefStack=0x33FF_5C00
orr r1,r0,#ABORTMODE|NOINT
msr cpsr_cxsf,r1 ;AbortMode
ldr sp,=AbortStack ; AbortStack=0x33FF_6000
orr r1,r0,#IRQMODE|NOINT
msr cpsr_cxsf,r1 ;IRQMode
ldr sp,=IRQStack ; IRQStack=0x33FF_7000
orr r1,r0,#FIQMODE|NOINT
msr cpsr_cxsf,r1 ;FIQMode
ldr sp,=FIQStack ; FIQStack=0x33FF_8000
bic r0,r0,#MODEMASK|NOINT
orr r1,r0,#SVCMODE
msr cpsr_cxsf,r1 ;SVCMode
ldr sp,=SVCStack ; SVCStack=0x33FF_5800
;USER mode has not be initialized.
;//為什么不用初始化user的stacks，系統(tǒng)剛啟動(dòng)的時(shí)候運(yùn)行在哪個(gè)模式下？
mov pc,lr
;The LR register wont be valid if the current mode is not SVC mode.？
;//系統(tǒng)一開(kāi)始運(yùn)行就是SVCmode？
;===========================================================
ReadNandID
mov r7,#NFCONF
ldr r0,[r7,#4] ;NFChipEn();
bic r0,r0,#2
str r0,[r7,#4]
mov r0,#0x90 ;WrNFCmd(RdIDCMD);
strb r0,[r7,#8]
mov r4,#0 ;WrNFAddr(0);
strb r4,[r7,#0xc]
1 ;while(NFIsBusy());
ldr r0,[r7,#0x20]
tst r0,#1
beq ?
ldrb r0,[r7,#0x10] ;id = RdNFDat()<<8;
mov r0,r0,lsl #8
ldrb r1,[r7,#0x10] ;id |= RdNFDat();
orr r5,r1,r0
ldr r0,[r7,#4] ;NFChipDs();
orr r0,r0,#2
str r0,[r7,#4]
mov pc,lr
ReadNandStatus
mov r7,#NFCONF
ldr r0,[r7,#4] ;NFChipEn();
bic r0,r0,#2
str r0,[r7,#4]
mov r0,#0x70 ;WrNFCmd(QUERYCMD);
strb r0,[r7,#8]
ldrb r1,[r7,#0x10] ;r1 = RdNFDat();
ldr r0,[r7,#4] ;NFChipDs();
orr r0,r0,#2
str r0,[r7,#4]
mov pc,lr
WaitNandBusy
mov r0,#0x70 ;WrNFCmd(QUERYCMD);
mov r1,#NFCONF
strb r0,[r1,#8]
1 ;while(!(RdNFDat()&0x40));
ldrb r0,[r1,#0x10]
tst r0,#0x40
beq ?
mov r0,#0 ;WrNFCmd(READCMD0);
strb r0,[r1,#8]
mov pc,lr
CheckBadBlk
mov r7, lr
mov r5, #NFCONF
bic r0,r0,#0x1f ;addr &= ~0x1f;
ldr r1,[r5,#4] ;NFChipEn()
bic r1,r1,#2
str r1,[r5,#4]
mov r1,#0x50 ;WrNFCmd(READCMD2)
strb r1,[r5,#8]
mov r1, #5;6 ;6->5
strb r1,[r5,#0xc] ;WrNFAddr(5);(6) 6->5
strb r0,[r5,#0xc] ;WrNFAddr(addr)
mov r1,r0,lsr #8 ;WrNFAddr(addr>>8)
strb r1,[r5,#0xc]
cmp r6,#0 ;if(NandAddr)
movne r0,r0,lsr #16 ;WrNFAddr(addr>>16)
strneb r0,[r5,#0xc]
; bl WaitNandBusy ;WaitNFBusy()
;do not use WaitNandBusy, after WaitNandBusy will read part A!
mov r0, #100
1
subs r0, r0, #1
bne ?
2
ldr r0, [r5, #0x20]
tst r0, #1
beq ?
ldrb r0, [r5,#0x10] ;RdNFDat()
sub r0, r0, #0xff
mov r1,#0 ;WrNFCmd(READCMD0)
strb r1,[r5,#8]
ldr r1,[r5,#4] ;NFChipDs()
orr r1,r1,#2
str r1,[r5,#4]
mov pc, r7
ReadNandPage
mov r7,lr
mov r4,r1
mov r5,#NFCONF
ldr r1,[r5,#4] ;NFChipEn()
bic r1,r1,#2
str r1,[r5,#4]
mov r1,#0 ;WrNFCmd(READCMD0)
strb r1,[r5,#8]
strb r1,[r5,#0xc] ;WrNFAddr(0)
strb r0,[r5,#0xc] ;WrNFAddr(addr)
mov r1,r0,lsr #8 ;WrNFAddr(addr>>8)
strb r1,[r5,#0xc]
cmp r6,#0 ;if(NandAddr)
movne r0,r0,lsr #16 ;WrNFAddr(addr>>16)
strneb r0,[r5,#0xc]
ldr r0,[r5,#4] ;InitEcc()
orr r0,r0,#0x10
str r0,[r5,#4]
bl WaitNandBusy ;WaitNFBusy()
mov r0,#0 ;for(i=0; i<512; i++)
1
ldrb r1,[r5,#0x10] ;buf[i] = RdNFDat()
strb r1,[r4,r0]
add r0,r0,#1
bic r0,r0,#0x10000
cmp r0,#0x200
bcc ?
ldr r0,[r5,#4] ;NFChipDs()
orr r0,r0,#2
str r0,[r5,#4]

mov pc,r7
;--------------------LED test
EXPORT Led_Test
Led_Test
mov r0, #0x56000000
mov r1, #0x5500
str r1, [r0, #0x50]
0
mov r1, #0x50
str r1, [r0, #0x54]
mov r2, #0x100000
1
subs r2, r2, #1
bne ?
mov r1, #0xa0
str r1, [r0, #0x54]
mov r2, #0x100000
2
subs r2, r2, #1
bne ?
b ?
mov pc, lr
;===========================================================
;=====================================================================
; Clock division test
; Assemble code, because VSYNC time is very short
;=====================================================================
EXPORT CLKDIV124
EXPORT CLKDIV144

CLKDIV124

ldr r0, = CLKDIVN
ldr r1, = 0x3 ; 0x3 = 1:2:4
str r1, [r0]
; wait until clock is stable
nop
nop
nop
nop
nop
ldr r0, = REFRESH
ldr r1, [r0]
bic r1, r1, #0xff
bic r1, r1, #(0x7<<8)
orr r1, r1, #0x470 ; REFCNT135
str r1, [r0]
nop
nop
nop
nop
nop
mov pc, lr
CLKDIV144
ldr r0, = CLKDIVN
ldr r1, = 0x4 ; 0x4 = 1:4:4
str r1, [r0]
; wait until clock is stable
nop
nop
nop
nop
nop
ldr r0, = REFRESH
ldr r1, [r0]
bic r1, r1, #0xff
bic r1, r1, #(0x7<<8)
orr r1, r1, #0x630 ; REFCNT675 - 1520
str r1, [r0]
nop
nop
nop
nop
nop
mov pc, lr


;存儲(chǔ)器控制寄存器的定義區(qū)
LTORG
SMRDATA DATA
; Memory configuration should be optimized for best performance
; The following parameter is not optimized.
; Memory access cycle parameter strategy
; 1) The memory settings is safe parameters even at HCLK=75Mhz.
; 2) SDRAM refresh period is for HCLK<=75Mhz.
DCD (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+ (B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+ (B6_BWSCON<<24)+(B7_BWSCON<<28)) ;各bank的bus width; 沒(méi)有B0，因?yàn)橛?OM[1:0]pins 確定
DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) ;GCS0
DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;GCS1
DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) ;GCS2
DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) ;GCS3
DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) ;GCS4
DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) ;GCS5
DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;GCS6 B6_MT定義在memcfg.inc中，11-->SDRAM ; B6_SCAN - 非reset 默認(rèn)值
DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;GCS7
DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) ;Tchr- not used
;DCD 0x32 ;SCLK power saving mode, BANKSIZE 128M/128M
DCD 0x31 ;SCLK power saving mode, BANKSIZE 64M/64M
DCD 0x30 ;MRSR6 CL=3clk
DCD 0x30 ;MRSR7 CL=3clk
BaseOfROM DCD |Image$$RO$$Base|
TopOfROM DCD |Image$$RO$$Limit|
BaseOfBSS DCD |Image$$RW$$Base|
BaseOfZero DCD |Image$$ZI$$Base|
EndOfBSS DCD |Image$$ZI$$Limit|

ALIGN
AREA RamData, DATA, READWRITE
^ _ISR_STARTADDRESS ; _ISR_STARTADDRESS=0x33FF_FF00
HandleReset # 4
HandleUndef # 4
HandleSWI # 4
HandlePabort # 4
HandleDabort # 4
HandleReserved # 4
HandleIRQ # 4
HandleFIQ # 4
;Dont use the label IntVectorTable,
;The value of IntVectorTable is different with the address you think it may be.
;IntVectorTable
;@0x33FF_FF20
HandleEINT0 # 4
HandleEINT1 # 4
HandleEINT2 # 4
HandleEINT3 # 4
HandleEINT4_7 # 4
HandleEINT8_23 # 4
HandleCAM # 4 ; Added for 2440.
HandleBATFLT # 4
HandleTICK # 4
HandleWDT # 4
HandleTIMER0 # 4
HandleTIMER1 # 4
HandleTIMER2 # 4
HandleTIMER3 # 4
HandleTIMER4 # 4
HandleUART2 # 4
;@0x33FF_FF60
HandleLCD # 4
HandleDMA0 # 4
HandleDMA1 # 4
HandleDMA2 # 4
HandleDMA3 # 4
HandleMMC # 4
HandleSPI0 # 4
HandleUART1 # 4
HandleNFCON # 4 ; Added for 2440.
HandleUSBD # 4
HandleUSBH # 4
HandleIIC # 4
HandleUART0 # 4
HandleSPI1 # 4
HandleRTC # 4
HandleADC # 4
;@0x33FF_FFA0
END
; HISTORY:
; 2002.02.25:kwtark: ver 0.0
; 2002.03.20:purnnamu: Add some functions for testing STOP,Sleep mode
; 2003.03.14:DonGo: Modified for 2440.
; 2009 06.24:Tinko Modified