ARM MPCore -- (2)

NOP不一定會(huì)占用CPU執(zhí)行時(shí)間，可能在執(zhí)行該指令前，CPU已將其從管道中移除。

可以用NOP進(jìn)行填充，使后續(xù)指令處于64bit邊界上。

2. SEV

向所有CPU Core發(fā)送事件信息。

3. WFE (Wait For Event)

如果未設(shè)置事件寄存器，則 WFE 會(huì)暫時(shí)中斷掛起執(zhí)行，直至發(fā)生任一以下事件后再恢復(fù)執(zhí)行：
(1)發(fā)生 IRQ 中斷，除非被 CPSR I 位屏蔽
(2)發(fā)生 FIQ 中斷，除非被 CPSR F 位屏蔽
(3)發(fā)生不精確的數(shù)據(jù)中止，除非被 CPSR A 位屏蔽
(4)出現(xiàn)調(diào)試進(jìn)入請(qǐng)求（需啟用調(diào)試）
(5)另一個(gè)處理器利用 SEV 指令向事件發(fā)送信號(hào)
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如果設(shè)置了事件寄存器，則 WFE 會(huì)清除該設(shè)置，然后立即返回。
如果實(shí)現(xiàn)了 WFE，則還必須實(shí)現(xiàn) SEV。

4. WFI (Wait For Interrupt)

WFI 會(huì)暫時(shí)將執(zhí)行中斷掛起，直至發(fā)生以下事件后再恢復(fù)執(zhí)行：
(1)發(fā)生 IRQ 中斷，不考慮 CPSR I 位
(2)發(fā)生 FIQ 中斷，不考慮 CPSR F 位
(3)發(fā)生不精確的數(shù)據(jù)中止，除非被 CPSR A 位屏蔽
(4)出現(xiàn)調(diào)試進(jìn)入請(qǐng)求，無論是否啟用調(diào)試

5. SEV/WFE用處

SEV/WFE are not intended for synchronisation- but for power management. Because of the way WFE is defined, there is no guarantee that the CPU1 will only awake when CPU0 executes SEV. It could wake at time for any number of reasons. Usually examples show SEV/WFE as a form of simple power management in a spin-lock. Something like:

lock_spin_lock (assume addr in r0)
LDREX r1, [r0]
CMP r1, #UNLOCKED
WFENE ; If not unlocked go to sleep
BNE lock_spin_lock ; on waking, re-check the spin-lock
...

Its the spin-lcok that provides the synchronisation, not the WFE. The WFE just is a way of saving power while you wait for the resource to become free